Integrated
Circuit
Systems, Inc.
ICS8523I-03
L
OW
S
KEW
, 1-
TO
-4
D
IFFERENTIAL
-
TO
-LVHSTL F
ANOUT
B
UFFER
the input is driven by an LVHSTL driver. CLK_EN is set at logic
low to select CLK0/nCLK0 input.
S
CHEMATIC
E
XAMPLE
This application note provides general design guide using
ICS8523I-03 LVHSTL buffer. Figure 3 shows a schematic ex-
ample of the ICS8523I-03 LVHSTL Clock buffer. In this example,
Zo = 50
+
Zo = 50
3.3V
R12
1K
U1
1.8V
Zo = 50 Ohm
1
2
3
4
5
6
7
8
9
10
GND
CLK_EN
CLK_SEL
CLK0
nCLK0
CLK1
nCLK1
NC
NC
VDD
Q0
nQ0
VDDO
Q1
nQ1
Q2
nQ2
VDDO
Q3
nQ3
20
19
18
17
16
15
14
13
12
11
1.8V
Zo = 50
1.8V
R4
50
R3
50
Zo = 50
R2
50
R1
50
-
+
-
Zo = 50 Ohm
R11
1K
LVHSTL Driver
R9
50
R10
50
C1
0.1u
3.3V
ICS8523-03
1.8V
Zo = 50
+
Zo = 50
C2
0.1u
C3
0.1u
R6
50
R5
50
-
Zo = 50
+
Zo = 50
R8
50
R7
50
-
F
IGURE
4. E
XAMPLE
ICS8523I-03 LVHSTL C
LOCK
O
UTPUT
B
UFFER
S
CHEMATIC
8523AGI-03
www.icst.com/products/hiperclocks.html
9
REV. A OCTOBER 5, 2004
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
