IC41C16100S
IC41LV16100S
TRUTH TABLE
Function
Standby
Read: Word
Read: Lower Byte
Read: Upper Byte
Write: Word (Early Write)
Write: Lower Byte (Early Write)
Write: Upper Byte (Early Write)
Read-Write
(1,2)
EDO Page-Mode Read
(2)
RAS
H
L
L
L
L
L
L
LCAS UCAS
H
H
L
L
L
H
H
L
L
H
L
H→L
H→L
L→H
H→L
H→L
H→L
H→L
L
L
H
L
L
L
H
L
L
H→L
H→L
L→H
H→L
H→L
H→L
H→L
L
L
H
L
WE
X
H
H
H
L
L
L
H→L
H
H
H
L
L
H→L
H→L
H
L
X
X
OE
X
L
L
L
X
X
X
L→H
L
L
L
X
X
L→H
L→H
L
X
X
X
Address t
R
/t
C
X
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
ROW/COL
NA/COL
NA/NA
ROW/COL
NA/COL
ROW/COL
NA/COL
ROW/COL
ROW/COL
ROW/NA
X
I/O
High-Z
D
OUT
Lower Byte, D
OUT
Upper Byte, High-Z
Lower Byte, High-Z
Upper Byte, D
OUT
D
IN
Lower Byte, D
IN
Upper Byte, High-Z
Lower Byte, High-Z
Upper Byte, D
IN
D
OUT
, D
IN
D
OUT
D
OUT
D
OUT
D
IN
D
IN
D
OUT
, D
IN
D
OUT
, D
IN
D
OUT
D
OUT
High-Z
High-Z
EDO Page-Mode Write
(1)
EDO Page-Mode
(1,2)
Read-Write
Hidden Refresh
RAS-Only
Refresh
CBR Refresh
(4)
L
1st Cycle:
L
2nd Cycle:
L
Any Cycle:
L
1st Cycle:
L
2nd Cycle:
L
1st Cycle:
L
2nd Cycle:
L
Read
(2)
L→H→L
Write
(1,3)
L→H→L
L
H→L
Notes:
1. These WRITE cycles may also be BYTE WRITE cycles (either
LCAS
or
UCAS
active).
2. These READ cycles may also be BYTE READ cycles (either
LCAS
or
UCAS
active).
3. EARLY WRITE only.
4. At least one of the two
CAS
signals must be active (LCAS or
UCAS).
4
Integrated Circuit Solution Inc.
DR010-0D 11/26/2004
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
