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IC42S16100-6T 参数 Datasheet PDF下载

IC42S16100-6T图片预览
型号: IC42S16100-6T
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×16位×2组( 16兆位)同步动态RAM [512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM]
分类和应用: 存储内存集成电路光电二极管动态存储器时钟
文件页数/大小: 78 页 / 802 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IC42S16100
Self-Refresh Command
(CS,
RAS, CAS,
CKE = LOW,
WE
= HIGH)
This command executes the self-refresh operation. The
row address to be refreshed, the bank, and the refresh
interval are generated automatically internally during this
operation. The self-refresh operation is started by dropping
the CKE pin from HIGH to LOW. The self-refresh operation
continues as long as the CKE pin remains LOW and there
is no need for external control of any other pins. The self-
refresh operation is terminated by raising the CKE pin from
LOW to HIGH. The next command cannot be executed
until the device internal recovery period (t
RC
) has elapsed.
After the self-refresh, since it is impossible to determine the
address of the last row to be refreshed, an auto-refresh
should immediately be performed for all addresses (4096
cycles).
Both banks must be placed in the idle state before executing
this command.
Power-Down Command
(CKE = LOW)
When both banks are in the idle (inactive) state, or when at
least one of the banks is not in the idle (inactive) state, this
command can be used to suppress device power dissipation
by reducing device internal operations to the absolute
minimum. Power-down mode is started by dropping the
CKE pin from HIGH to LOW. Power-down mode continues
as long as the CKE pin is held low. All pins other than the
CKE pin are invalid and none of the other commands can
be executed in this mode. The power-down operation is
terminated by raising the CKE pin from LOW to HIGH. The
next command cannot be executed until the recovery
period (t
CKA
) has elapsed.
Since this command differs from the self-refresh command
described above in that the refresh operation is not
performed automatically internally, the refresh operation
must be performed within the refresh period (t
REF
). Thus
the maximum time that power-down mode can be held is
just under the refresh cycle time.
Burst Stop Command
(CS,
WE,
= LOW,
RAS, CAS
= HIGH)
The command forcibly terminates burst read and write
operations. When this command is executed during a burst
read operation, data output stops after the
CAS
latency
period has elapsed.
Clock Suspend
(CKE = LOW)
This command can be used to stop the device internal
clock temporarily during a read or write cycle. Clock
suspend mode is started by dropping the CKE pin from
HIGH to LOW. Clock suspend mode continues as long as
the CKE pin is held LOW. All input pins other than the CKE
pin are invalid and none of the other commands can be
executed in this mode. Also note that the device internal
state is maintained. Clock suspend mode is terminated by
raising the CKE pin from LOW to HIGH, at which point
device operation restarts. The next command cannot be
executed until the recovery period (t
CKA
) has elapsed.
Since this command differs from the self-refresh command
described above in that the refresh operation is not
performed automatically internally, the refresh operation
must be performed within the refresh period (t
REF
). Thus
the maximum time that clock suspend mode can be held
is just under the refresh cycle time.
No Operation
(CS, = LOW,
RAS, CAS, WE
= HIGH)
This command has no effect on the device.
Device Deselect Command
(CS = HIGH)
This command does not select the device for an object of
operation. In other words, it performs no operation with
respect to the device.
12
Integrated Circuit Solution Inc.
DR024-0D 06/25/2004