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IS61C512-20TI 参数 Datasheet PDF下载

IS61C512-20TI图片预览
型号: IS61C512-20TI
PDF下载: 下载PDF文件 查看货源
内容描述: 64K ×8高速CMOS静态RAM [64K x 8 HIGH-SPEED CMOS STATIC RAM]
分类和应用:
文件页数/大小: 8 页 / 425 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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IS61C512
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE1
Access Time
CE2 Access Time
OE
Access Time
-15 ns
Min. Max.
15
3
0
0
2
2
0
0
15
15
15
7
6
8
12
-20 ns
Min. Max.
20
3
0
0
3
3
0
0
20
20
20
8
9
9
18
-25 ns
Min. Max.
25
3
0
0
3
3
0
0
25
25
25
9
10
10
20
-35 ns
Min. Max.
35
3
0
0
3
3
0
0
35
35
35
12
12
12
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
RC
t
AA
t
OHA
t
ACE
1
t
ACE
2
t
DOE
t
LZOE
(2)
OE
to Low-Z Output
t
HZOE
(2)
OE
to High-Z Output
t
LZCE
1
(2)
CE1
to Low-Z Output
t
LZCE
2
(2)
CE2 to Low-Z Output
t
HZCE
(2)
CE1
or CE2 to High-Z Output
t
PU
(3)
t
PD
(3)
CE1
or CE2 to Power-Up
CE1
or CE2 to Power-Down
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1a and 1b
AC TEST LOADS
1213
3.3V
3.3V
1213
OUTPUT
100 pF
Including
jig and
scope
1378
OUTPUT
5 pF
Including
jig and
scope
1378
Figure 1a.
4
Figure 1b.
Integrated Circuit Solution Inc.
SR011-0B