IDT 70121/70125S/L
HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT
COMMERCIAL TEMPERATURE RANGE
DESCRIPTION (Cont'd):
Fabricated using IDT’s CMOS high-performance
technology, these devices typically operate on only 500mW of
power. Low-power (L) versions offer battery backup data
retention capability with each port typically consuming 200µW
from a 2V battery.
The IDT70121/IDT70125 devices are packaged in a 52-pin
PLCC.
PIN CONFIGURATIONS
(1,2)
W
L
W
R
R/
INT
R
INT
L
R/
V
CC
A
10R
A
10L
CE
L
CE
R
A
0L
OE
L
INDEX
BUSY
R
BUSY
L
21
22
23
24
25
26
27
28
29
30
31
32
I/O
4L
I/O
5L
I/O
6L
I/O
7L
I/O
8L
GND
I/O
0R
I/O
1R
I/O
2R
I/O
3R
I/O
4R
I/O
5R
I/O
6R
33
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
I/O
3L
9
10
11
12
13
14
15
16
17
18
19
20
1
8
46
45
44
43
OE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
I/O
8R
I/O
7R
RECOMMENDED OPERATING TEMPERATURE
AND SUPPLY VOLTAGE
Grade
Commercial
Ambient Temperature
0°C to +70°C
GND
0V
V
CC
5.0V
±
10%
2654 tbl 02
51
50
7
6
3
52
49
5
2
48
4
IDT70121/125
J52-1
PLCC
TOP VIEW
(3)
47
42
41
40
39
38
37
36
35
34
RECOMMENDED DC
OPERATING CONDITIONS
Symbol
V
CC
GND
V
IH
V
IL
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
–0.5
(1)
Typ.
5
0
–
–
Max.
5.5
0.0
6.0
(2)
0.8
Unit
V
V
V
V
2654 tbl 03
2654 drw 02
NOTES:
1. All Vcc pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. This text does not indicate the orientation of the actual part-marking.
NOTES:
1. V
IL
> -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed Vcc + 0.5V.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
A
T
BIAS
T
STG
I
OUT
(2)
CAPACITANCE
(1)
(T
A
= +25°C, f = 1.0MHz)
Unit
V
°C
°C
°C
mA
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Condition
(2)
V
IN
= 3dV
V
OUT
= 3dV
Max.
9
10
Unit
pF
pF
Rating
Terminal Voltage
with Respect to GND
Operating
Temperature
Temperature
Under Bias
Storage
Temperature
DC Output
Current
Commercial
–0.5 to +7.0
0 to +70
–55 to +125
–55 to +125
50
NOTES:
2654 tbl 13
1. This parameter is determined by device characterization but is not
production tested.
2. 3dV represents the interpolated capacitance when the input and output
signals switch from 0V to 3V or from 3V to 0V.
NOTES:
2654 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliabilty.
2. V
TERM
must not exceed Vcc + 0.5V for more than 25% of the cycle time or
10ns maximum, and is limited to < 20mA for the period of V
TERM
> V
cc
+
0.5V.
6.10
2
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
