IDT7133SA/LA, IDT7143SA/LA
High-Speed 2K x 16 Dual-Port RAM
Military, Industrial and Commercial Temperature Ranges
Data Retention Characteristics
(LA Version Only) V
LC
= 0.2V, V
HC
= V
CC
- 0.2V
7133LA/7143LA
Symbol
V
DR
I
CCDR
Parameter
V
CC
for Data Retention
Data Retention Current
V
CC
= 2V
CE
> V
HC
V
IN
> V
HC
or < V
LC
t
CDR
(3)
t
R
(3)
Chip Deselect to Data Retention Time
Operation Recovery Time
MIL. & IND.
COM'L.
Test Condition
Min.
2.0
___
Typ.
(1)
___
Max.
___
Unit
V
µA
100
100
___
4000
1500
___
___
0
t
RC
(2)
V
V
2746 tbl 08
___
___
NOTES:
1. Vcc = 2V, T
A
= +25°C, and are not production tested.
2. t
RC
= Read Cycle Time
3. This parameter is guaranteed by device characterization but is not production tested.
Data Retention Waveform
DATA RETENTION MODE
V
CC
t
CDR
CE
V
DR
V
IH
V
IH
2746 drw 05
4.5V
V
DR
> 2V
4.5V
t
R
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns Max.
1.5V
1.5V
Figures 1, 2 and 3
2746 tbl 09
5V
1250Ω
DATA
OUT
775Ω
30pF
Figure 1. AC Output Test Load
5V
1250Ω
DATA
OUT
775Ω
5pF*
BUSY
5V
270Ω
30pF
2746 drw 06
Figure 2. Output Load
(for t
LZ
, t
HZ
, t
WZ
, t
OW
)
*Including scope and jig
Figure 3.
BUSY
Output Load
(IDT7133 only)
6.42
6
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
