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IDT71V321L25PFI 参数 Datasheet PDF下载

IDT71V321L25PFI图片预览
型号: IDT71V321L25PFI
PDF下载: 下载PDF文件 查看货源
内容描述: HIGH -SPEED 3.3V 2K ×8双端口静态与中断RAM [HIGH-SPEED 3.3V 2K x 8 DUAL-PORT STATIC RAM WITH INTERRUPT]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 14 页 / 130 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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IDT71V321/71V421S/L  
High Speed 3.3V 2K x 8 Dual-Port Static RAM with Interrupts  
Industrial and Commercial Temperature Ranges  
DC Electrical Characteristics Over the Operating  
Temperature and Supply Voltage Range(1,2) (VCC = 3.3V ± 0.3V)  
71V321X25  
71V421X25  
Com'l  
71V321X35  
71V321X55  
71V421X55  
Com'l Only  
71V421X35  
Com'l Only  
& Ind  
Symbol  
Parameter  
Test Condition  
Version  
COM'L  
Typ.  
Max.  
Typ.  
55  
Max.  
125  
Typ.  
55  
Max. Unit  
ICC  
Dynamic Operating  
Current  
(Both Ports Active)  
S
L
55  
55  
130  
100  
115  
85  
mA  
mA  
mA  
mA  
mA  
CE = VIL, Outputs Disabled  
SEM = VIH  
55  
95  
55  
(3)  
f = fMAX  
IND  
S
L
55  
55  
150  
130  
___  
___  
___  
___  
ISB1  
ISB2  
ISB3  
ISB4  
Standby Current  
(Both Ports - TTL  
Level Inputs)  
COM'L  
IND  
S
L
15  
15  
35  
20  
15  
15  
35  
20  
15  
15  
35  
20  
CER = CEL = VIH  
SEMR = SEML = VIH  
(3)  
f = fMAX  
S
L
15  
15  
50  
35  
___  
___  
___  
___  
(5)  
Standby Current  
(One Port - TTL  
Level Inputs)  
COM'L  
IND  
S
L
25  
25  
75  
55  
25  
25  
70  
50  
25  
25  
60  
40  
CE"A" = VIL and CE"B" = VIH  
Active Port Outputs Disabled,  
(3)  
f=fMAX  
S
L
25  
25  
95  
75  
SEMR = SEML = VIH  
___  
___  
___  
___  
Full Standby Current  
(Both Ports - All  
CMOS Level Inputs)  
Both Ports  
L and  
CE  
COM'L  
IND  
S
L
1.0  
0.2  
5
3
1.0  
0.2  
5
3
1.0  
0.2  
5
3
CER > VCC - 0.2V  
VIN > VCC - 0.2V or  
VIN < 0.2V, f = 0(4)  
S
L
1.0  
0.2  
10  
6
___  
___  
___  
___  
SEMR = SEML > VCC - 0.2V  
Full Standby Current  
(One Port - All  
CMOS Level Inputs)  
COM'L  
IND  
S
L
25  
25  
70  
55  
25  
25  
65  
50  
25  
25  
55  
40  
CE"A" < 0.2V and  
(5)  
CE"B" > VCC - 0.2V  
=
L > VCC - 0.2V  
SEMR SEM  
S
L
25  
25  
85  
70  
VIN > VCC - 0.2V or VIN < 0.2V  
Active Port Outputs Disabled  
___  
___  
___  
___  
(3)  
f = fMAX  
3026 tbl 06  
NOTES:  
1. 'X' in part numbers indicates power rating (S or L).  
2. VCC = 3.3V, TA = +25°C, and are not production tested. ICCDC = 70mA (Typ.).  
3. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC and using "AC Test Conditions" of input levels  
of GND to 3V.  
4. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby.  
5. Port "A" may be either left or right port. Port "B" is opposite from port "A".  
Data Retention Characteristics(L Version Only)  
(1)  
Symbol  
VDR  
ICCDR  
Parameter  
Test Condition  
Min.  
Typ.  
Max.  
Unit  
V
___  
VCC for Data Retention  
2.0  
0
___  
Data Retention Current  
µA  
VCC = 2V, CE > VCC - 0.2V  
COM'L.  
IND.  
100  
1500  
(3)  
___  
tCDR  
IN  
CC  
IN  
Chip Deselect to Data  
Retention Time  
V > V - 0.2V or V < 0.2V  
100  
4000  
µA  
V
___  
___  
0
(3)  
(2)  
___  
___  
tR  
Operation Recovery Time  
tRC  
V
3026 tbl 07  
NOTES:  
1. VCC = 2V, TA = +25°C, and is not production tested.  
2. tRC = Read Cycle Time.  
3. This parameter is guaranteed by device characterization but not production tested.  
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