IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II
TM
36-BIT FIFO
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
FUNCTIONAL DESCRIPTION
TIMING MODES: IDT STANDARD vs FIRST WORD FALL THROUGH
(FWFT) MODE
The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690/
72V36100/72V36110 support two different timing modes of operation: IDT
Standard mode or First Word Fall Through (FWFT) mode. The selection of
which mode will operate is determined during Master Reset, by the state of the
FWFT/SI input.
If, at the time of Master Reset, FWFT/SI is LOW, then IDT Standard mode
will be selected. This mode uses the Empty Flag (EF) to indicate whether or
not there are any words present in the FIFO. It also uses the Full Flag function
(FF) to indicate whether or not the FIFO has any free space for writing. In IDT
Standard mode, every word read from the FIFO, including the first, must be
requested using the Read Enable (REN) and RCLK.
If, at the time of Master Reset, FWFT/SI is HIGH, then FWFT mode will be
selected. This mode uses Output Ready (OR) to indicate whether or not there
is valid data at the data outputs (Q
n)
. It also uses Input Ready (IR) to indicate
whether or not the FIFO has any free space for writing. In the FWFT mode,
the first word written to an empty FIFO goes directly to Q
n
after three RCLK rising
edges,
REN
= LOW is not necessary. Subsequent words must be accessed
using the Read Enable (REN) and RCLK.
Various signals, both input and output signals operate differently depending
on which timing mode is in effect.
IDT STANDARD MODE
In this mode, the status flags,
FF, PAF, HF, PAE,
and
EF
operate in the
manner outlined in Table 3. To write data into to the FIFO, Write Enable (WEN)
must be LOW. Data presented to the DATA IN lines will be clocked into the FIFO
on subsequent transitions of the Write Clock (WCLK). After the first write is
performed, the Empty Flag (EF) will go HIGH. Subsequent writes will continue
to fill up the FIFO. The Programmable Almost-Empty flag (PAE) will go HIGH
after n + 1 words have been loaded into the FIFO, where n is the empty offset
value. The default setting for these values are stated in the footnote of Table 2.
This parameter is also user programmable. See section on Programmable Flag
Offset Loading.
If one continued to write data into the FIFO, and we assumed no read
operations were taking place, the Half-Full flag (HF) would toggle to LOW once
the 513rd word for IDT72V3640, 1,025th word for IDT72V3650, 2,049th word
for IDT72V3660, 4,097th word for IDT72V3670, 8,193th word for the
IDT72V3680, 16,385th word for the IDT72V3690, 32,769th word for the
IDT72V36100 and 65,537th word for the IDT72V36110, respectively was
written into the FIFO. Continuing to write data into the FIFO will cause the
Programmable Almost-Full flag (PAF) to go LOW. Again, if no reads are
performed, the
PAF
will go LOW after (1,024-m) writes for the IDT72V3640,
(2,048-m) writes for the IDT72V3650, (4,096-m) writes for the IDT72V3660,
(8,192-m) writes for the IDT72V3670, (16,384-m) writes for the IDT72V3680,
(32,768-m) writes for the IDT72V3690, (65,536-m) writes for the IDT72V36100
and (131,072-m) writes for the IDT72V36110. The offset “m” is the full offset
value. The default setting for these values are stated in the footnote of Table 2.
This parameter is also user programmable. See section on Programmable Flag
Offset Loading.
When the FIFO is full, the Full Flag (FF) will go LOW, inhibiting further write
operations. If no reads are performed after a reset,
FF
will go LOW after D writes
to the FIFO. D = 1,024 writes for the IDT72V3640, 2,048 writes for the
IDT72V3650, 4,096 writes for the IDT72V3660, 8,192 writes for the IDT72V3670,
16,384 writes for the IDT72V3680, 32,768 writes for the IDT72V3690, 65,536
9
writes for the IDT72V36100 and 131,072 writes for the IDT72V36110,
respectively.
If the FIFO is full, the first read operation will cause
FF
to go HIGH.
Subsequent read operations will cause
PAF
and
HF
to go HIGH at the conditions
described in Table 3. If further read operations occur, without write operations,
PAE
will go LOW when there are n words in the FIFO, where n is the empty
offset value. Continuing read operations will cause the FIFO to become empty.
When the last word has been read from the FIFO, the
EF
will go LOW inhibiting
further read operations.
REN
is ignored when the FIFO is empty.
When configured in IDT Standard mode, the
EF
and
FF
outputs are double
register-buffered outputs.
Relevant timing diagrams for IDT Standard mode can be found in Figure
7,8,11 and 13.
FIRST WORD FALL THROUGH MODE (FWFT)
In this mode, the status flags,
IR, PAF, HF, PAE,
and
OR
operate in the
manner outlined in Table 4. To write data into to the FIFO,
WEN
must be LOW.
Data presented to the DATA IN lines will be clocked into the FIFO on subsequent
transitions of WCLK. After the first write is performed, the Output Ready (OR)
flag will go LOW. Subsequent writes will continue to fill up the FIFO.
PAE
will go
HIGH after n + 2 words have been loaded into the FIFO, where n is the empty
offset value. The default setting for these values are stated in the footnote of Table
2. This parameter is also user programmable. See section on Programmable
Flag Offset Loading.
If one continued to write data into the FIFO, and we assumed no read
operations were taking place, the
HF
would toggle to LOW once the 514th word
for the IDT72V3640, 1,026th word for the IDT72V3650, 2,050th word for the
IDT72V3660, 4,098th word for the IDT72V3670, 8,194th word for the
IDT72V3680, 16,386th word for the IDT72V3690, 32,770th word for the
IDT72V36100 and 65,538th word for the IDT72V36110, respectively was
written into the FIFO. Continuing to write data into the FIFO will cause the
PAF
to go LOW. Again, if no reads are performed, the
PAF
will goLOW after (1,025-m)
writes for the IDT72V3640, (2,049-m) writes for the IDT72V3650, (4,097-m)
writes for the IDT72V3660 and (8,193-m) writes for the IDT72V3670, 16,385
writes for the IDT72V3680, 32,769 writes for the IDT72V3690, 65,537 writes
for the IDT72V36100 and 131,073 writes for the IDT72V36110, where m is the
full offset value. The default setting for these values are stated in the footnote
of Table 2.
When the FIFO is full, the Input Ready (IR) flag will go HIGH, inhibiting further
write operations. If no reads are performed after a reset,
IR
will go HIGH after
D writes to the FIFO. D = 1,025 writes for the IDT72V3640, 2,049 writes for
the IDT72V3650, 4,097 writes for the IDT72V3660 and 8,193 writes for the
IDT72V3670,16,385 writes for the IDT72V3680, 32,769 writes for the
IDT72V3690, 65,537 writes for the IDT72V36100 and 131,073 writes for the
IDT72V36110, respectively. Note that the additional word in FWFT mode is due
to the capacity of the memory plus output register.
If the FIFO is full, the first read operation will cause the
IR
flag to go LOW.
Subsequent read operations will cause the
PAF
and
HF
to go HIGH at the
conditions described in Table 4. If further read operations occur, without write
operations, the
PAE
will go LOW when there are n + 1 words in the FIFO, where
n is the empty offset value. Continuing read operations will cause the FIFO to
become empty. When the last word has been read from the FIFO,
OR
will go
HIGH inhibiting further read operations.
REN
is ignored when the FIFO is empty.
When configured in FWFT mode, the
OR
flag output is triple register-
buffered, and the
IR
flag output is double register-buffered.
Relevant timing diagrams for FWFT mode can be found in Figure 9, 10, 12,
and 14.
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
