Functional Description
If X2 become "0" again, the multiframe counter counts 20 frames and begins again
autonomously.
If X2 is kept "1", the multiframe counter is permanently reset and the M-bit stays at "1". If X2
becomes "0" for only one S-frame, the multiframe-counter reaches frame no. 2 at which "0" is
transmitted in the M-bit location.
Thus, the M-bit can be use to transfer synchronization pulses of any internal between different
S-interfaces.
CP
SFS
S-Frame
Generator
Transmitter
S
U
Multi-Frame
Counter
Reset
X2
SSYNC
ITS05897
Figure 55
S-Frame Trigger and Multiframe Generation
2.5.9.3
M-Bit Output (TE Mode)
In TE mode, the PEB 2086 outputs the value of the M-bit multiplexed to the value of the Echo-
bits on the X2 pin.
The value of M should be sampled at the falling edge of FSC.
Semiconductor Group
103
INFINEON [ INFINEON TECHNOLOGIES AG ]
