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CDP6805E2Q 参数 Datasheet PDF下载

CDP6805E2Q图片预览
型号: CDP6805E2Q
PDF下载: 下载PDF文件 查看货源
内容描述: 微处理器单元 [Microprocessor Unit]
分类和应用: 微处理器微控制器
文件页数/大小: 33 页 / 344 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA6805E2
Microprocessor Unit
As of Production Version 00
29 August 2007
I/O Signal Description
The table below describes the I/O characteristics for each signal on the IC. The signal names
correspond to the signal names on the pinout diagrams provided.
S IG N A L N A M E
V
DD
an d V
SS
(P o w e r a n d G ro u n d )
R ESET _n
(R e s e t)
IR Q _ n
(In te rru p t R e q u e s t)
LI
(L o a d In s tru c tio n )
I/O
N /A
I
I
D E S C R IP T IO N
S o u rc e :
T h e s e tw o p in s p ro v id e p o w e r to th e c h ip .
p o w e r a n d V
S S
is g ro u n d .
V
D D
p ro v id e s + 5 v o lts (± 0 .5 )
T T L :
In p u t p in th a t c a n b e u s e d to re s e t th e M P U 's in te rn a l s ta te b y p u llin g th e re s e t_ n
p in lo w .
T T L :
In p u t p in th a t is le v e l a n d e d g e s e n s itiv e . C a n b e u s e d to re q u e s t a n in te rru p t
sequence.
T T L w ith s le w ra te c o n tro l:
O u tp u t p in u s e d to in d ic a te th a t a n e x t o p c o d e fe tc h is in
p ro g re s s . U s e d o n ly fo r c e rta in d e b u g g in g a n d te s t s ys te m s . N o t c o n n e c te d in
n o rm a l o p e ra tio n . O v e rla p s D a ta S tro b e (D S ) s ig n a l. T h is o u tp u t is c a p a b le o f d riv in g
o n e s ta n d a rd T T L lo a d a n d 5 0 p F .
T T L w ith s le w ra te c o n tro l:
O u tp u t p in u s e d to tra n s fe r d a ta to o r fro m a p e rip h e ra l
o r m e m o ry. D S o c c u rs a n ytim e th e M P U d o e s a d a ta re a d o r w rite a n d d u rin g d a ta
tra n s fe r to o r fro m in te rn a l m e m o ry. D S is a v a ila b le a t f
O S C
¸5 w h e n th e M P U is n o t in
th e W A IT o r S T O P m o d e . T h is o u tp u t is c a p a b le o f d riv in g o n e s ta n d a rd T T L lo a d a n d
130pF.
T T L w ith s le w ra te c o n tro l:
O u tp u t p in u s e d to in d ic a te th e d ire c tio n o f d a ta tra n s fe r
fro m in te rn a l m e m o ry, I/O re g is te rs , a n d e x te rn a l p e rip h e ra l d e vic e s a n d m e m o rie s .
In d ic a te s to a s e le c te d p e rip h e ra l w h e th e r th e M P U is to re a d (R W _ n h ig h ) o r w rite
(R W _ n lo w ) d a ta o n th e n e x t d a ta s tro b e . T h is o u tp u t is c a p a b le o f d riv in g o n e
s ta n d a rd T T L lo a d a n d 1 3 0 p F .
T T L w ith s le w ra te c o n tro l:
O u tp u t s tro b e u s e d to in d ic a te th e p re s e n c e o f a n
a d d re s s o n th e 8 -b it m u ltip le x e d b u s . T h e A S lin e is u s e d to d e m u ltip le x th e e ig h t
le a s t s ig n ific a n t a d d re s s b its fro m th e d a ta b u s . A S is a v a ila b le a t f
O S C
¸ 5 w h e n th e
M P U is n o t in th e W A IT o r S T O P m o d e s . T h is o u tp u t is c a p a b le o f d riv in g o n e
s ta n d a rd T T L lo a d a n d 1 3 0 p F .
T T L w ith s le w ra te c o n tro l:
T h e s e 1 6 lin e s c o n s titu te In p u t/O u tp u t p o rts A a n d B .
E a c h lin e is in d iv id u a lly p ro g ra m m e d to b e e ith e r a n in p u t o r o u tp u t u n d e r s o ftw a re
c o n tro l o f th e D a ta D ire c tio n R e g is te r (D D R ) a s s h o w n b e lo w in
T a b le 1
a n d
F ig u re 2
.
T h e p o rt I/O is p ro g ra m m e d b y w ritin g th e c o rre s p o n d in g b it in th e D D R to a "1 " fo r
o u tp u t a n d a "0 " fo r in p u t. In th e o u tp u t m o d e th e b its a re la tc h e d a n d a p p e a r o n th e
c o rre s p o n d in g o u tp u t p in s . A ll th e D D R 's a re in itia lize d to a "0 " o n re s e t. T h e o u tp u t
p o rt re g is te rs a re n o t in itia lize d o n re s e t. E a c h o u tp u t is c a p a b le o f d riv in g o n e
s ta n d a rd T T L lo a d a n d 5 0 p F .
T T L w ith s le w ra te c o n tro l:
T h e s e five o u tp u ts c o n s titu te th e h ig h e r o rd e r n o n -
m u ltip le x e d a d d re s s lin e s . E a c h o u tp u t is c a p a b le o f d riv in g o n e s ta n d a rd T T L lo a d
and 130pF.
T T L w ith s le w ra te c o n tro l:
T h e s e b i-d ire c tio n a l lin e s c o n s titu te th e lo w e r o rd e r
a d d re s s e s a n d d a ta . T h e s e lin e s a re m u ltip le x e d w ith a d d re s s p re s e n t a t a d d re s s
s tro b e tim e a n d d a ta p re s e n t a t d a ta s tro b e tim e . W h e n in th e d a ta m o d e , th e s e lin e s
a re b i-d ire c tio n a l, tra n s fe rrin g d a ta to a n d fro m m e m o ry a n d p e rip h e ra l d e v ic e s a s
in d ic a te d b y th e R W _ n p in . A s o u tp u ts , th e s e lin e s a re c a p a b le o f d riv in g o n e
s ta n d a rd T T L lo a d a n d 1 3 0 p F .
T T L :
In p u t u s e d to c o n tro l th e in te rn a l tim e r/c o u n te r c irc u itry.
T T L O s c illa to r in p u t/o u tp u t:
T h e s e p in s p ro v id e c o n tro l in p u t fo r th e o n -c h ip c lo c k
o s c illa to r c irc u its . E ith e r a c rys ta l o r e x te rn a l c lo c k is c o n n e c te d to th e s e p in s to
p ro v id e a s ys te m c lo c k . T h e c rys ta l c o n n e c tio n is s h o w n in
F ig u re 3
. T h e O S C 1 to
b u s tra n s itio n s fo r s ys te m d e s ig n s u s in g o s c illa to rs s lo w e r th a n 5 M H z is s h o w n in
F ig u re 4
.
T h e c irc u it s h o w n in
F ig u re 3
is re c o m m e n d e d w h e n u s in g a c rys ta l. A n e x te rn a l
C M O S o s c illa to r is re c o m m e n d e d w h e n u s in g c rys ta ls o u ts id e th e s p e c ifie d ra n g e s .
T o m in im ize o u tp u t d is to rtio n a n d s ta rt-u p s ta b iliza tio n tim e , th e c rys ta l a n d
c o m p o n e n ts s h o u ld b e m o u n te d a s c lo s e to th e in p u t p in s a s p o s s ib le .
W h e n a n e x te rn a l c lo c k is u s e d , it s h o u ld b e a p p lie d to th e O S C 1 in p u t w ith th e O S C 2
in p u t n o t c o n n e c te d , a s s h o w n in
F ig u re 3
.
O
DS
(D a ta S tro b e )
O
R W _n
(R e a d /W rite )
O
AS
(A d d re s s S tro b e )
O
P A 0 -P A 7 /P B 0 -P B 7
(In p u t/O u tp u t L in e s )
I/O
A 8 -A 1 2
(H ig h O rd e r A d d re s s
L in e s )
O
B 0 -B 7
(A d d re s s /D a ta B u s )
I/O
T im e r
O SC 1, O SC 2
(S y s te m C lo c k )
I
I/O
C rys ta l
E x te rn a l C lo c k
Table 1
Copyright
©
2007
©
IA211081401-03
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