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NZ48F4000L0ZBQ0 参数 Datasheet PDF下载

NZ48F4000L0ZBQ0图片预览
型号: NZ48F4000L0ZBQ0
PDF下载: 下载PDF文件 查看货源
内容描述: 1.8 ?伏?英特尔? StrataFlash㈢ ?无线存储器?与? 3.0伏? I / O ? ( L30 ) [1.8 Volt Intel StrataFlash㈢ Wireless Memory with 3.0-Volt I/O (L30)]
分类和应用: 存储无线
文件页数/大小: 100 页 / 1405 K
品牌: INTEL [ INTEL CORPORATION ]
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28F640L30, 28F128L30, 28F256L30
2.2
Ballout Diagrams for VF BGA Package
The L30 flash memory device is available in a VF BGA package with 0.75 mm ball-pitch.
shows the ballout for the 64-Mbit and 128-Mbit devices in the 56-ball VF BGA package with a 7 x
8 active-ball matrix.
shows the device ballout for the 256-Mbit device in the 63-ball VF
BGA package with a 7 x 9 active-ball matrix. Both package densities are ideal for space-
constrained board applications
Figure 1. 7x8 Active-Ball Matrix for 64-, and 128-Mbit Densities in VF BGA Packages
1
A
A11
B
A12
C
A13
D
A15
E
VCCQ
F
VSS
G
D7
2
3
4
5
6
7
8
8
7
6
5
4
3
2
1
A
A8
VSS
VCC
VPP
A18
A6
A4
A4
A6
A18
VPP
VCC
VSS
A8
A11
B
A9
A20
CLK
RST#
A17
A5
A3
A3
A5
A17
RST#
CLK
A20
A9
A12
C
A10
A21
ADV#
WE#
A19
A7
A2
A2
A7
A19
WE#
ADV#
A21
A10
A13
D
A14
WAIT
A16
D12
WP#
A22
A1
A1
A22
WP#
D12
A16
WAIT
A14
A15
E
D15
D6
D4
D2
D1
CE#
A0
A0
CE#
D1
D2
D4
D6
D15
VCCQ
F
D14
D13
D11
D10
D9
D0
OE#
OE#
D0
D9
D10
D11
D13
D14
VSS
G
VSSQ
D5
VCC
D3
VCCQ
D8
VSSQ
VSSQ
D8
VCCQ
D3
VCC
D5
VSSQ
D7
VFBGA 7x8
Top View - Ball Side Down
VFBGA 7x8
Bottom View - Ball Side Up
NOTE:
On lower-density devices, upper-address balls can be treated as NC. (e.g., for 64-Mbit density, A22 will be NC)
Figure 2. 7x9 Active-Ball Matrix for 256-Mbit Density in VF BGA Package
1
2
3
4
5
6
7
8
9
10
11
12
13
13
12
11
10
9
8
7
6
5
4
3
2
1
A
DU
B
DU
C
A13
D
A15
E
VCCQ
F
DU
G
DU
DU
D7
VSSQ
D5
VCC
D3
VCCQ
Top View
D8
VSSQ
RFU
DU
DU
DU
DU
RFU
VSSQ
D8
VCCQ
D3
-
VCC
D5
VSSQ D7
DU
DU
DU
VSS
D14
D13
D11
D10
D9
D0
OE#
RFU
DU
DU
DU
DU
RFU
OE#
D0
D9
D10
D11
D13
D14
VSS
DU
DU
D15
D6
D4
D2
D1
CE#
A0
A23
A23
A0
CE#
D1
D2
D4
D6
D15
VCCQ
A14
WAIT
A16
D12
WP#
A22
A1
A24
A24
A1
A22
WP#
D12
A16
WAIT
A14
A15
A10
A21
ADV#
WE#
A19
A7
A2
A25
A25
A2
A7
A19
WE#
ADV#
A21
A10
A13
DU
A12
A9
A20
CLK
RST#
A17
A5
A3
RFU
DU
DU
DU
DU
RFU
A3
A5
A17
RST#
CLK
A20
A9
A12
DU
DU
DU
A11
A8
VSS
VCC
VPP
A18
A6
A4
RFU
DU
DU
DU
DU
RFU
A4
A6
A18
VPP
VCC
VSS
A8
A11
DU
DU
A
B
C
D
E
F
G
Ball Side Down-
Bottom View
Ball Side Up
NOTE:
On lower density devices upper address balls can be treated as RFUs. (A24 is for 512Mb and A25 is for 1Gb densities.) All
ball locations are populated.
10
Datasheet