8-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
The 28F800 products are available in the
44-lead PSOP (Plastic Small Outline)
package (a ROM/EPROM-compatible
pinout) and the 48-lead TSOP (Thin Small
Outline, 1.2 mm thick) package as shown in
Figures 2, and 3, respectively. The 28F800
is not available in 56-lead TSOP. The
28F008B products are available in the 40-
lead TSOP package as shown in Figure1.
Refer to the DC Characteristics Table,
Section 5.2 (commercial temperature)
and Section 6.2 (extended temperature),
for complete current and voltage
specifications. Refer to the AC
Characteristics Table, Section 5.3
(commercial temperature) and Section
6.3 (extended temperature), for read,
write and erase performance
specifications.
1.3
Applications
The 8-Mbit boot block flash memory family
combines high-density, low-power, high-
performance, cost-effective flash memories
with blocking and hardware protection
capabilities. Their flexibility and versatility
reduce costs throughout the product life
cycle. Flash memory is ideal for just-in-
time production flow, reducing system
inventory and costs, and eliminating
component handling during the production
phase.
When your product is in the end-user’s
hands, and updates or feature enhancements
become necessary, flash memory reduces
the update costs by allowing user-
performed code changes instead of costly
product returns or technician calls.
The 8-Mbit boot block flash memory family
provides full-function, blocked flash
memories suitable for a wide range of
applications. These applications include
ROM-able applications storage, digital
cellular phone program and data storage,
telecommunication boot/firmware, printer
firmware/font storage and various other
embedded applications where program and
data storage are required.
The 8-Mbit flash memory products are also
excellent design solutions for digital
cellular phone and telecommunication
switching applications requiring very low
power consumption, high-performance,
high-density storage capability, modular
software designs, and a small form factor
package. The 8-Mbit’s blocking scheme
allows for easy segmentation of the
embedded code with
16 Kbytes of hardware-protected boot code,
eight main blocks of program code and two
parameter blocks of 8 Kbytes each for
frequently updated data storage and
diagnostic messages (e.g., phone numbers,
authorization codes).
Intel’s boot block architecture provides a
flexible solution for the different design
needs of various applications. The
asymmetrically-blocked memory map
allows the integration of several memory
components into a single flash device. The
boot block provides a secure boot PROM;
the parameter blocks can emulate EEPROM
functionality for parameter store with
proper software techniques; and the main
blocks provide code and data storage with
access times fast enough to execute code in
place, decreasing RAM requirements.
PRODUCT PREVIEW
7
INTEL [ INTEL CORPORATION ]
