15 V
S
1 kΩ
G
SD5000
TTL or
CMOS
5V
SD5000
TTL
15 V
D
±5 V
S
D
0 to 10 V
G
SD210
SD5000
B
1 kΩ
S
D
0 to 10 V
15 V
G
15 V CMOS
SD210
B
D
TTL
G
S
SD5000
-5 V
S
15 V
G
SD211
D
±10 V
-5 V
±5 V
B
-10 V
-10 V
Figure 13. Various DMOS Drivers
High-Speed Multiplexer
In a typical application, the circuit of Figure 14
is used to multiplex and sample-and-hold two
analog signals at a 5-MHz rate. Two of the
switches in an SD5000 are used as level
shifter/drivers to provide the gate drive of the
single-pole-double-throw arrangement formed
by switches 3 and 4. Capacitors C1 and C2
provide charge injection compensation.
Signal 1 is a 6-V, 156-kHz square wave. Signal
2 is a 2-Vpp, 78-kHz alternating waveform with
a dc offset of -3.4 V (Figure 15).
Figure 16 illustrates the resulting composite
waveform present at the holding capacitor along
with the gate 3 control signal.
As can be seen, the switching times are about 15
ns, the acquisition time is 80 ns, and the holding
time is about 90 ns. The total sample-and-hold
cycle takes 200 ns.
Even though not
maximized, this speed is faster than what any
other presently available (50 ns) analog switch
products can achieve.
8
Linear Integrated Systems, Inc.
●
4042 Clipper Ct.
●
Fremont, CA 94538
●
Tel: 510 490-9160
●
Fax: 510 353-0261
LINEAR [ LINEAR INTEGRATED SYSTEMS ]
