LTC1235
APPLICATIONS INFORMATION
The 10.7ms allows enough time to execute shut-down
procedure for microprocessor and 831mV of hysteresis
would prevent
PFO
from going low due to the noise of V
IN
.
Example 2:
The circuit in Figure 9 can be used to mea-
sure the regulated 5V supply to provide early warning of
power failure. Because of variations in the PFI threshold,
this circuit requires adjustment to ensure that the PFI
comparator trips before the reset threshold is reached.
Adjust R5 such that the
PFO
output goes low when the
V
CC
supply reaches the desired level (e.g., 4.85V).
Monitoring the Status of the Battery
C3 can also monitor the status of the memory backup
battery (Figure 10). If desired, the
CE
OUT can be used to
apply a test load to the battery. Since
CE
OUT is forced high
in battery backup mode, the test load will not be applied
to the battery while it is in use, even if the microprocessor
is not powered.
Watchdog Timer
The LTC1235 provides a watchdog timer function to monitor
the activity of the microprocessor. If the microprocessor
does not toggle the Watchdog Input (WDI) within the
time-out period, the reset outputs are forced to active
states for a minimum of 140ms. The watchdog time-out
period is fixed at 1.0 second minimum on the LTC1235.
This time-out period provides adequate time for many
systems to service the watchdog timer immediately after
a reset. Figure 11 shows the timing diagram of watchdog
R1
1M
PFI
+3V
R2
1M
CE
OUT
BACKUP
CE
IN
GND
TO μP I/O PIN
time-out period and reset active time. The watchdog time-
out period is restarted as soon as the reset outputs are
inactive. When either a high-to-low or low-to-high transi-
tion occurs at the WDI pin prior to time-out, the watchdog
time is reset and begins to time out again. To ensure the
watchdog time does not time out, either a high-to-low or
low-to-high transition on the WDI pin must occur at or
less than the minimum time-out period. If the input to the
WDI pin remains either high or low, reset pulses will be
issued every 1.6 seconds typically. The watchdog timer
can be deactivated by floating the WDI pin. The timer
is also disabled when V
CC
falls below the reset voltage
threshold or V
BATT
.
The Watchdog Output,
WDO,
goes low if the watchdog timer
is allowed to time out and remains low until set high by the
next transition on the WDI pin.
WDO
is also set high when
V
CC
falls below the reset voltage threshold or V
BATT
.
+5V
V
BATT
V
CC
PFO
LTC1235
LOW BATTERY SIGNAL
TO μP I/O PIN
RL 20k
OPTIONAL TEST LOAD
1235 F10
Figure 10. Backup Battery Monitor with Optional Test Load
V
CC
= 5V
WDI
t1 = RESET ACTIVE TIME
t2 = WATCHDOG TIME-OUT PERIOD
WDO
t2
t2
RESET
t1
t1
t1
1235 F11
Figure 11. Watchdog Time-out Period and Reset Active Time
1235fa
13
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