88F6180
Hardware Specifications
6
6.1
6.1.1
System Power Up/Down and Reset
Settings
This section provides information about the device power-up/down sequence and configuration at
reset.
Power-Up/Down Sequence Requirements
Power-Up Sequence Requirements
These guidelines must be applied to meet the 88F6180 device power-up requirements:
The non-core voltages (I/O and Analog) as listed in
must reach 70% of their voltage
level before the core voltages reach 70% of their voltage level.
The order of the power-up sequence between the non-core voltages is unimportant so long as
the non-core voltages power up before the core voltages reach 70% of their voltage level
(shown in
The reset signal(s) must be asserted before the core voltages reach 70% of their voltage level
(shown in
The reference clock(s) inputs must toggle with their respective voltage levels before the core
voltages reach 70% of their voltage level (shown in
If VHV is set to burning mode (2.5V), which is a higher voltage than the VDD voltage, VDD must
be powered before VHV, to prevent the fuse from being accidentally burned.
Table 27: I/O and Core Voltages
N o n - C o r e Vo lta g e s
I/ O Vo lta ge s
VDD_GE
VDD_M
VDDO
A n a lo g P o w e r Su p pl i es
CPU_PLL_AVDD
CORE_PLL_AVDD
PEX_AVDD
RTC_AVDD
SSCG_AVDD
XTAL_AVDD
USB_AVDD
VDD
C or e Vo l ta g es
Doc. No. MV-S104988-U0 Rev. E
Page 48
Document Classification: Proprietary Information
Copyright © 2008 Marvell
December 2, 2008, Preliminary
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
