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MAS9078BTC2 参数 Datasheet PDF下载

MAS9078BTC2图片预览
型号: MAS9078BTC2
PDF下载: 下载PDF文件 查看货源
内容描述: AM接收器IC [AM Receiver IC]
分类和应用:
文件页数/大小: 10 页 / 209 K
品牌: MAS [ MICRO ANALOG SYSTEMS ]
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DA9078.003
28 January 2004
TYPICAL APPLICATION
Note 1
X1
QO
Ferrite-
Antenna
RFI
AGC Amplifier
QI
AON (=AGC on)
Demodulator
&
Comparator
OUT
Receiver
output
VDD
1.4 V
Power Supply/Biasing
VSS
PDN
Note 2
C
AGC
10 uF
C
DEM
47 nF
AGC
DEC
Note 3
Power Down /
Fast Startup
Control
Note 1: Crystal
The crystal as well as ferrite antenna frequencies are chosen according to the time-signal system (Table 1). The
crystal shunt capacitance C
0
should be matched as well as possible with the internal shunt capacitance
compensation capacitance C
C
. MAS9078 has five compensation capacitance options. Capacitance values and
suitable crystals are described in Table 2. See also Ordering Information (p.10).
Time-Signal System
DCF77
MSF
WWVB
JJY
Table 1
Device
MAS9078B1
MAS9078B2
MAS9078B3
MAS9078B4
MAS9078B5
Table 2
Location
Antenna Frequency
Recommended Crystal Frequency
77.503 kHz
60.003 kHz
60.003 kHz
40.003 kHz and 60.003 kHz
Germany
77.5 kHz
United Kingdom
60 kHz
USA
60 kHz
Japan
40 kHz and 60 kHz
Time-Signal System Frequencies
C
C
Crystal Description
0.75 pF
For single low C
0
crystal (Nominal value)
1.25 pF
For single high C
0
crystal
1.625 pF
For two parallel low C
0
crystals (dual band receiver)
2.5 pF
For two parallel high C
0
crystals (dual band receiver)
3.875 pF
Any crystal with parallel external compensation capacitor
Compensation Capacitance Options
Note 2: AGC Capacitor
The AGC and DEC capacitors must have low leakage currents due to very small 40 nA signal currents through
the capacitors. The insulation resistance of these capacitors should be higher than 70 MΩ. Also probes with at
least 100 MΩ impedance should be used for voltage probing of AGC and DEC pins.
Note 3: Power Down / Fast Startup Control
Both power down and fast startup are controlled using the PDN pin. The device is in power down (turned off) if
PDN = VDD and in power up (turned on) if PDN = VSS. Fast startup is triggered by the falling edge of PDN
signal, i.e., controlling device from power down to power up. The startup time without using the fast startup
control can be several minutes but with fast startup it is shortened typically to 12 s.
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