4 Megabit (512K x 8-Bit) CMOS SRAM
33C408
T
ABLE
1. P
INOUT
D
ESCRIPTION
P
IN
12-5, 27, 26, 23, 25, 4,
28, 3, 31, 2, 30, 1
29
22
24
13-15, 17-21
32
16
S
YMBOL
A0-A18
WE
CS
OE
I/O 1-I/O 8
V
CC
V
SS
D
ESCRIPTION
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power (+5.0V)
Ground
T
ABLE
2. 33C408 A
BSOLUTE
M
AXIMUM
R
ATINGS
P
ARAMETER
Voltage on V
CC
supply relative to V
SS
Voltage on any pin relative to V
SS
Power Dissipation
Storage Temperature
Operating Temperature
S
YMBOL
V
CC
V
IN
, V
OUT
P
D
T
S
T
A
M
IN
-0.5
-0.5
--
-65
-55
M
AX
7.0
V
CC
+0.5
1.0
+150
+125
U
NIT
V
V
W
°
C
°
C
T
ABLE
3. D
ELTA
L
IMITS
P
ARAMETER
I
CC1
I
SB
I
SB1
I
LI
V
ARIATION
±10% of stated vaule in Table 6
±10% of stated vaule in Table 6
±10% of stated vaule in Table 6
±10% of stated vaule in Table 6
04.16.02 REV 8
All data sheets are subject to change without notice
2
©2002 Maxwell Technologies
All rights reserved.
MAXWELL [ MAXWELL TECHNOLOGIES ]
