欢迎访问ic37.com |
会员登录 免费注册
发布采购

MX29F800TMC-90 参数 Datasheet PDF下载

MX29F800TMC-90图片预览
型号: MX29F800TMC-90
PDF下载: 下载PDF文件 查看货源
内容描述: 8M - BIT [ 1Mx8 / 512Kx16 ] CMOS FLASH MEMORY [8M-BIT [1Mx8/512Kx16] CMOS FLASH MEMORY]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 42 页 / 693 K
品牌: MCNIX [ MACRONIX INTERNATIONAL ]
 浏览型号MX29F800TMC-90的Datasheet PDF文件第5页浏览型号MX29F800TMC-90的Datasheet PDF文件第6页浏览型号MX29F800TMC-90的Datasheet PDF文件第7页浏览型号MX29F800TMC-90的Datasheet PDF文件第8页浏览型号MX29F800TMC-90的Datasheet PDF文件第10页浏览型号MX29F800TMC-90的Datasheet PDF文件第11页浏览型号MX29F800TMC-90的Datasheet PDF文件第12页浏览型号MX29F800TMC-90的Datasheet PDF文件第13页  
MX29F800T/B
SECTOR ERASE COMMANDS
The Automatic Sector Erase does not require the de-
vice to be entirely pre-programmed prior to executing
the Automatic Set-up Sector Erase command and Au-
tomatic Sector Erase command. Upon executing the
Automatic Sector Erase command, the device will auto-
matically program and verify the sector(s) memory for
an all-zero data pattern. The system is not required to
provide any control or timing during these operations.
When the sector(s) is automatically verified to contain
an all-zero pattern, a self-timed sector erase and verify
begin. The erase and verify operations are complete
when the data on Q7 is "1" and the data on Q6 stops
toggling for two consecutive read cycles, at which time
the device returns to the Read mode. The system is not
required to provide any control or timing during these
operations.
When using the Automatic sector Erase algorithm, note
that the erase automatically terminates when adequate
erase margin has been achieved for the memory array
(no erase verification command is required). Sector
erase is a six-bus cycle operation. There are two "un-
lock" write cycles. These are followed by writing the
set-up command 80H. Two more "unlock" write cycles
are then followed by the sector erase command 30H.
The sector address is latched on the falling edge of WE
or CE, whichever happens later, while the command(data)
is latched on the rising edge of WE or CE, whichever
happens first. Sector addresses selected are loaded
into internal register on the sixth falling edge of WE or
CE, whichever happens later. Each successive sector
load cycle started by the falling edge of WE or CE,
whichever happens later must begin within 30us from
the rising edge of the preceding WE or CE, whichever
happens first. Otherwise, the loading period ends and
internal auto sector erase cycle starts. (Monitor Q3 to
determine if the sector erase timer window is still open,
see section Q3, Sector Erase Timer.) Any command other
than Sector Erase(30H) or Erase Suspend(B0H) during
the time-out period resets the device to read mode.
Table 4. Write Operation Status
Status
Byte Program in Auto Program Algorithm
Auto Erase Algorithm
Erase Suspend Read
(Erase Suspended Sector)
In Progress
Erase Suspended Mode
Erase Suspend Read
Data
(Non-Erase Suspended Sector)
Erase Suspend Program
Byte Program in Auto Program Algorithm
Exceeded
Time Limits
Auto Erase Algorithm
Erase Suspend Program
Q7
Q7
0
Q7
Data
Toggle
Toggle
Toggle
Toggle
Data Data Data
0
1
1
1
N/A
N/A
1
N/A
N/A
No
Toggle
Toggle
N/A
1
0
0
0
0
Q7
Note1
Q7
0
1
Q6
Toggle
Toggle
No
Toggle
Q5
Note2
0
0
0
Q3
N/A
1
Q2
No
Toggle
Toggle
RY/BY
0
0
1
N/A Toggle
Note:
1. Q7 and Q2 require a valid address when reading status information. Refer to the appropriate subsection for further
details.
2. Q5 switches to '1' when an Auto Program or Auto Erase operation has exceeded the maximum timing limits.
See "Q5:Exceeded Timing Limits " for more information.
P/N:PM0578
REV. 1.7, JUL. 24, 2001
9