ML2724
ATM<2:0> - Register 2, Bits 2-4
Analog Test Mode:
The test mode selected is described in Table 15. The performance of the ML2724 is not specified
in these test modes. Although primarily intended for IC test and debug, they also can help in debugging the radio
system. The default (power-up) state of these bits is ATM<2:0>=<0,0,0>. When a non-zero value is written to the field,
the RSSI and AOUT pins become analog test access ports, giving access to the outputs of key signal processing
stages in the transceiver. During normal operation, ATM<2:0> must be set to all zeros.
ATM2
0
0
0
0
1
1
1
1
ATM1
0
0
1
1
0
0
1
1
ATM0
0
1
0
1
0
1
0
1
RSSI
RSSI
No Connect
I IF Filter Output
Q IF Filter – ve Output
I IF Filter – ve Output
Data Filter + ve Output
I IF Limiter Outputs
1.67V Voltage Reference
AOUT
Set by AOUT bit
No Connect
Q IF Filter Output
Q IF Filter + ve Output
I IF Filter + ve Output
Data Filter – ve Output
Q IF Limiter Outputs
VCO Modulation Port Input
Table 15: Analog Test Control Bits
DTM <2:0> - Register 2, Bits 5-7
Digital Test Mode:
The DTM<2:0> bit functions are described in Table 16. The performance of the ML2724 is not
specified in these test modes. Although primarily intended for IC test and debug, they also can help in debugging the
radio system. The default (power up) state of these bits is DTM<2:0>=<0,0,0>. When a non-zero value is written to
these fields, the DOUT and PAON pins become a digital test access port for key digital signals in the transceiver.
During normal operation, DTM<2:0> must be set to all zeros.
DTM2
0
0
0
0
1
DTM1
0
0
1
1
0
DTM0
0
1
0
1
0
PAON
PA Control
PA Control
PA Control
PA Control
S – D Modulation LSB
DOUT
Data Out
AGC Switch State
PLL Main Divider Output
PLL Reference Divider Output
Sigma – Delta Modulation MSB
Table 16: Digital Test Control Bits
DATA INTERFACES
BASEBAND INTERFACE: DIN & DOUT
The DIN and DOUT pins are digital CMOS signals that correspond to FSK modulation of the carrier frequency. The
ML2724 is designed to operate as an FSK transceiver in the 2.4GHz ISM band. The frequency deviation and transmit
filtering is determined in the transceiver.
Data on the DIN pin is filtered and presented to the transmit two-port modulator. There is no re-timing of the bits, so the
transmitted FSK data takes its timing from the input data. In the receive chain, FSK demodulation, data filtering, and
data slicing take place in the ML2724, and the digital data is output on the DOUT pin. Bit and word rate timing recovery
are performed off chip. The data filter output is available on the AOUT pin for use with an optional external data slicer.
DS2724-F-01
FINAL DATASHEET
APRIL 2003
22
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
