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PIC18F8490-I/PT 参数 Datasheet PDF下载

PIC18F8490-I/PT图片预览
型号: PIC18F8490-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚闪存微控制器与LCD驱动器和纳瓦技术 [64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology]
分类和应用: 驱动器闪存微控制器
文件页数/大小: 414 页 / 6891 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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PIC18F6390/6490/8390/8490
15.0
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
15.3
SPI Mode
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of SPI are supported. To accomplish
communication, typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO/SEG12
• Serial Data In (SDI) – RC4/SDI/SDA
• Serial Clock (SCK) – RC3/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RF7/SS/SEG25
module when operating in SPI mode.
15.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
2
C)
- Full Master mode
- Slave mode (with general address call)
The I
2
C interface supports the following modes in
hardware:
• Master mode
• Multi-Master mode
• Slave mode
FIGURE 15-1:
MSSP BLOCK DIAGRAM
(SPI MODE)
Internal
Data Bus
Read
SSPBUF reg
Write
15.2
Control Registers
RC4/SDI/SDA
SSPSR reg
RC5/SDO/SEG12
bit 0
Shift
Clock
The MSSP module has three associated registers.
These include a status register (SSPSTAT) and two
control registers (SSPCON1 and SSPCON2). The use
of these registers and their individual Configuration bits
differ significantly depending on whether the MSSP
module is operated in SPI or I
2
C mode.
Additional details are provided under the individual
sections.
RF7/SS/
SEG25
SS Control
Enable
Edge
Select
2
Clock Select
SSPM3:SSPM0
SMP:CKE 4
TMR2 Output
2
2
RC3/SCK/
SCL
(
)
Edge
Select
Prescaler T
OSC
4, 16, 64
Data to TXx/RXx in SSPSR
TRIS bit
©
2007 Microchip Technology Inc.
DS39629C-page 157