512Mb, 1Gb, 2Gb: P30-65nm
Bus Operations
Bus Operations
CE# LOW and RST# HIGH enable READ operations. The device internally decodes up-
per address inputs to determine the accessed block. ADV# LOW opens the internal ad-
dress latches. OE# LOW activates the outputs and gates selected data onto the I/O bus.
Bus cycles to/from the device conform to standard microprocessor bus operations. Bus
operations and the logic levels that must be applied to the device control signal inputs
are shown here.
Table 5: Bus Operations
Bus Operation
READ
Asynchronous
Synchronous
WRITE
OUTPUT DISABLE
STANDBY
RESET
Notes:
RST#
H
H
H
H
H
L
CLK
X
Run-
ning
X
X
X
X
ADV#
L
L
L
X
X
X
CE#
L
L
L
L
H
X
OE#
L
L
H
H
X
X
WE#
H
H
L
H
X
X
WAIT
De-asserted
Driven
High-Z
High-Z
High-Z
High-Z
DQ[15:0]
Output
Output
Input
High-Z
High-Z
High-Z
Notes
-
-
1
2
2
2, 3
1. Refer to the Device Command Bus Cycles for valid DQ[15:0] during a WRITE operation.
2. X = "Don’t Care" (H or L).
3. RST# must be at V
SS
± 0.2V to meet the maximum specified power-down current.
Read
To perform a READ operation, RST# and WE# must be de-asserted while CE# and OE#
are asserted. CE# is the device-select control. When asserted, it enables the device. OE#
is the data-output control. When asserted, the addressed flash memory data is driven
onto the I/O bus.
Write
To perform a WRITE operation, both CE# and WE# are asserted while RST# and OE# are
de-asserted. During a WRITE operation, address and data are latched on the rising edge
of WE# or CE#, whichever occurs first. The Command Bus Cycles table shows the bus
cycle sequence for each of the supported device commands, while the Command Codes
and Definitions table describes each command.
Note:
WRITE operations with invalid V
CC
and/or V
PP
voltages can produce spurious re-
sults and should not be attempted.
Output Disable
When OE# is de-asserted, device outputs DQ[15:0] are disabled and placed in High-Z
state, WAIT is also placed in High-Z.
Standby
When CE# is de-asserted the device is deselected and placed in standby, substantially
reducing power consumption. In standby, the data outputs are placed in High-Z, inde-
pendent of the level placed on OE#. Standby current (I
CCS
) is the average current meas-
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
17
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