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JS28F512P30TF 参数 Datasheet PDF下载

JS28F512P30TF图片预览
型号: JS28F512P30TF
PDF下载: 下载PDF文件 查看货源
内容描述: 美光并行NOR闪存的嵌入式存储器( P30-65nm ) [Micron Parallel NOR Flash Embedded Memory (P30-65nm)]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 92 页 / 1225 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512Mb, 1Gb, 2Gb: P30-65nm
Device Command Bus Cycles
Device Command Bus Cycles
Device operations are initiated by writing specific device commands to the command
user interface (CUI). Several commands are used to modify array data including WORD
PROGRAM and BLOCK ERASE commands. Writing either command to the CUI initiates
a sequence of internally timed functions that culminate in the completion of the re-
quested task. However, the operation can be aborted by either asserting RST# or by is-
suing an appropriate suspend command.
Table 7: Command Bus Cycles
Bus
Cycles
1
≥2
≥2
2
1
2
>2
>2
First Bus Cycle
Op
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
Addr
1
DnA
DnA
DnA
DnA
DnA
WA
WA
WA
Data
2
0xFF
0x90
0x98
0x70
0x50
0x40
0xE8
0x80
Op
READ
READ
READ
WRITE
WRITE
WRITE
Second Bus Cycle
Addr
1
DBA + IA
DBA + CFI-A
DnA
WA
WA
WA
Data
2
ID
CFI-D
SRD
WD
N-1
0xD0
Mode
Read
Command
READ ARRAY
READ DEVICE IDENTIFIER
READ CFI
READ STATUS REGISTER
CLEAR STATUS REGISTER
Program
WORD PROGRAM
BUFFERED PROGRAM
3
BUFFERED ENHANCED
FACTORY PROGRAM
(BEFP)
4
Erase
Suspend
Protection
BLOCK ERASE
PROGRAM/ERASE SUSPEND
PROGRAM/ERASE RESUME
BLOCK LOCK
BLOCK UNLOCK
BLOCK LOCK DOWN
PROGRAM OTP REGISTER
PROGRAM LOCK REGISTER
2
1
1
2
2
2
2
2
2
2
>2
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
BA
DnA
DnA
BA
BA
BA
PRA
LRA
RCD
BA
WA
0x20
0xB0
0xD0
0x60
0x60
0x60
0xC0
0xC0
0x60
0xBC
0xEB
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
WRITE
Write
BA
BA
BA
BA
OTP-RA
LRA
RCD
BA
WA
0xD0
0x01
0xD0
0x2F
OTP-D
LRD
0x03
D0
Sub-Op code
Configuration
Blank Check
EFI
CONFIGURE READ
CONFIGURATION REGISTER
BLOCK BLANK CHECK
EXTENDED FUNCTION
INTERFACE
5
Notes:
1. First command cycle address should be the same as the operation’s target address. DBA
= Device base address (needed for dual die 512Mb device); DnA = Address within the de-
vice; IA = Identification code address offset; CFI-A = Read CFI address offset; WA = Word
address of memory location to be written; BA = Address within the block; OTP-RA = Pro-
tection register address; LRA = Lock register address; RCD = Read configuration register
data on A[16:1] for Easy BGA and TSOP, A[15:0] for QUAD+ package.
2. ID = Identifier data; CFI-D = CFI data on DQ[15:0]; SRD = Status register data; WD = Word
data; N = Word count of data to be loaded into the write buffer; OTP-D = Protection
register data; LRD = Lock register data.
PDF: 09005aef845667b3
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
22
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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