FUNCTIONAL BLOCK DIAGRAM
2 Meg x 32
V
CC
P
RAS#
COMMAND
DECODE
64Mb: x16, x32 SyncFlash
MT28S4M16B1LC_2.p65 – Rev. 2, Pub. 4/02
RP#
STATE MACHINE
STATUS REG.
16
High Voltage
Switch/Pump
BANK 3
BANK 2
BANK 1
ID REG.
CKE
CLK
CS#
WE#
COMMAND
EXECUTION
LOGIC
CAS#
NVMODE
REGISTER
MODE REGISTER
11
11
4
4
DQM0–
DQM3
BANK 0
ROW-
ADDRESS
2,048
LATCH
&
DECODER
BANK 0
MEMORY
ARRAY
(2,048 x 256 x 32)
SENSE AMPLIFIERS
32
8,192
6
DATA
OUTPUT
REGISTER
2
BANK
CONTROL
LOGIC
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
32
256
DATA
INPUT
REGISTER
32
DQ0–
DQ31
COLUMN
DECODER
8
A0–A10,
BA0, BA1
13
ADDRESS
REGISTER
64Mb: x16, x32
SYNCFLASH MEMORY
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
8
COLUMN-
ADDRESS
COUNTER/
LATCH
ADVANCE
MICRON [ MICRON TECHNOLOGY ]
