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MT48H16M32LFCM-75L 参数 Datasheet PDF下载

MT48H16M32LFCM-75L图片预览
型号: MT48H16M32LFCM-75L
PDF下载: 下载PDF文件 查看货源
内容描述: 512MB :梅格32 ×16 , 16兆×32移动SDRAM [512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM]
分类和应用: 内存集成电路动态存储器时钟
文件页数/大小: 73 页 / 2407 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第27页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第28页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第29页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第30页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第32页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第33页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第34页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第35页  
512Mb : 32 Me g x 16, 16 Me g x 32 Mo b ile SDRAM  
Op e ra t io n s  
WRITE command. Full-speed random write accesses within a page can be performed to  
the same bank, as shown in Figure 21 on page 32, or each subsequent WRITE may be  
performed to a different bank.  
Fig u re 19: WRITE Bu rst  
T0  
T1  
T2  
T3  
CLK  
WRITE  
NOP  
NOP  
NOP  
COMMAND  
ADDRESS  
DQ  
BANK,  
COL n  
DIN  
DIN  
n + 1  
n
DON’T CARE  
Notes: 1. BL = 2. DQM is LOW.  
Fig u re 20: WRITE-t o -WRITE  
T0  
T1  
T2  
CLK  
WRITE  
NOP  
WRITE  
COMMAND  
ADDRESS  
DQ  
BANK,  
COL n  
BANK,  
COL b  
DIN  
DIN  
DIN  
b
n
n + 1  
DON’T CARE  
Notes: 1. DQM is LOW. Each WRITE command may be to any bank.  
Data for any WRITE burst may be truncated with a subsequent READ command, and  
data for a fixed-length WRITE burst may be immediately followed by a READ command.  
Once the READ command is registered, the data inputs will be ignored, and WRITEs will  
not be executed. An example is shown in Figure 22 on page 32. Data n + 1 is either the  
last of a burst of two or the last desired of a longer burst.  
Data for a fixed-length WRITE burst may be followed by, or truncated with, a  
PRECHARGE command to the same bank (provided that auto precharge was not acti-  
t
vated). The PRECHARGE command should be issued WR after the clock edge at which  
the last desired input data element is registered. The auto precharge mode requires a  
t
WR of at least one clock plus time, regardless of frequency.  
t
In addition, when truncating a WRITE burst at high clock frequencies ( CK < 15ns), the  
DQM signal must be used to mask input data for the clock edge prior to, and the clock  
edge coincident with, the PRECHARGE command. An example is shown in Figure 23 on  
page 33. Data n + 1 is either the last of a burst of two or the last desired of a longer burst.  
Following the PRECHARGE command, a subsequent command to the same bank  
t
cannot be issued until RP is met.  
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03  
MT48H32M16LF_1.fm - Rev. H 6/07 EN  
Micron Technology, Inc., reserves the right to change products or specifications without notice.  
©2005 Micron Technology, Inc. All rights reserved.  
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