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MT48H16M32LFCM-75L 参数 Datasheet PDF下载

MT48H16M32LFCM-75L图片预览
型号: MT48H16M32LFCM-75L
PDF下载: 下载PDF文件 查看货源
内容描述: 512MB :梅格32 ×16 , 16兆×32移动SDRAM [512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM]
分类和应用: 内存集成电路动态存储器时钟
文件页数/大小: 73 页 / 2407 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第28页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第29页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第30页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第31页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第33页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第34页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第35页浏览型号MT48H16M32LFCM-75L的Datasheet PDF文件第36页  
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Operations
In the case of a fixed-length burst being executed to completion, a PRECHARGE
command issued at the optimum time (as described above) provides the same opera-
tion that would result from the same fixed-length burst with auto precharge. The disad-
vantage of the PRECHARGE command is that it requires that the command and address
buses be available at the appropriate time to issue the command; the advantage of the
PRECHARGE command is that it can be used to truncate fixed-length bursts.
Figure 21:
Random WRITE Cycles
T0
CLK
T1
T2
T3
COMMAND
WRITE
WRITE
WRITE
WRITE
ADDRESS
BANK,
COL
n
BANK,
COL
a
BANK,
COL
x
BANK,
COL
m
DQ
D
IN
n
D
IN
a
D
IN
x
D
IN
m
DON’T CARE
Notes:
1. Each WRITE command may be to any bank. DQM is LOW.
Figure 22:
WRITE-to-READ
T0
CLK
T1
T2
T3
T4
T5
COMMAND
WRITE
NOP
READ
NOP
NOP
NOP
ADDRESS
BANK,
COL
n
BANK,
COL
b
DQ
D
IN
n
D
IN
n
+1
D
OUT
b
D
OUT
b
+1
DON’T CARE
Notes:
1. The WRITE command may be to any bank, and the READ command may be to any bank.
DQM is LOW. CL = 2 for illustration.
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
32
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2005 Micron Technology, Inc. All rights reserved.