1 MEG x 16
FPM DRAM
FAST-PAGE-MODEEARLYWRITECYCLE
t
t
RP
RASP
V
V
IH
IL
RAS#
t
t
t
RSH
CSH
PC
t
t
t
t
t
t
t
t
t
t
t
CRP
RCD
CAS, CLCH
CP
CAS, CLCH
CP
CAS, CLCH
CP
V
V
CASL#/CASH#
IH
IL
t
AR
t
RAD
RAH
t
t
t
t
t
t
t
t
CAH
ASR
ASC
CAH
ASC
CAH
ASC
V
V
IH
IL
ADDR
WE#
ROW
COLUMN
COLUMN
COLUMN
ROW
t
t
t
CWL
CWL
CWL
t
t
t
t
t
t
WCH
t
WP
WCS
WCH
WCS
WCH
WCS
t
t
WP
WP
V
V
IH
IL
t
t
WCR
RWL
t
DH
t
t
t
t
t
DS
DH
DS
DH
DS
V
V
IOH
IOL
DQ
VALID DATA
VALID DATA
VALID DATA
V
V
IH
IL
OE#
DON’T CARE
UNDEFINED
TIMING PARAMETERS
-5
-6
-5
-6
SYMBOL
MIN
38
0
MAX
MIN
45
0
MAX
UNITS
SYMBOL
MIN
20
9
MAX
MIN
MAX
UNITS
ns
t
t
AR
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PC
25
12
10
60
14
40
15
15
10
45
0
t
t
ASC
RAD
ns
t
t
ASR
0
0
RAH
9
ns
t
t
CAH
8
10
10
10
5
RASP
50
11
30
13
13
8
125,000
125,000
ns
t
t
CAS
8
10,000
10,000
RCD
ns
t
t
CLCH
10
8
RP
ns
t
t
CP
RSH
ns
t
t
CRP
5
5
RWL
ns
t
t
CSH
38
8
45
10
10
0
WCH
ns
t
t
CWL
WCR
38
0
ns
t
t
DH
8
WCS
ns
t
t
DS
0
WP
5
5
ns
1 Meg x 16 FPM DRAM
D51_5V_B.p65 – Rev. B; Pub 3/01
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.
©2001,MicronTechnology,Inc.
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