256Mb and 512Mb (256Mb/256Mb), P30-65nm
AC Read Specifications
AC Read Specifications
Table 44: AC Read Specifications
Parameter
Asynchronous Specifications
READ cycle time
t
AVAV
Symbol
Easy BGA
QUAD+
TSOP
Easy BGA
QUAD+
TSOP
Easy BGA
QUAD+
TSOP
t
GLQV
t
PHQV
t
ELQX
t
GLQX
t
EHQZ
t
GHQZ
t
OH
t
EHEL
t
ELTV
t
EHTZ
t
GLTV
t
GLTX
t
GHTZ
Min
100
110
–
–
–
–
–
–
0
0
–
–
0
17
–
–
–
0
–
10
10
–
Max
–
–
100
110
100
110
25
150
–
–
20
15
–
–
17
20
17
–
20
–
–
100
110
Unit
ns
Notes
–
Address to output valid
t
AVQV
ns
–
CE# LOW to output valid
t
ELQV
ns
–
OE# LOW to output valid
RST# HIGH to output valid
CE# LOW to output in Low-Z
OE# LOW to output in Low-Z
CE# HIGH to output in High-Z
OE# HIGH to output in High-Z
Output hold from first occurring
address, CE#, or OE# change
CE# pulse width HIGH
CE# LOW to WAIT valid
CE# HIGH to WAIT High-Z
OE# LOW to WAIT valid
OE# LOW to WAIT in Low-Z
OE# HIGH to WAIT in High-Z
Latching Specifications
Address setup to ADV# HIGH
CE# LOW to ADV# HIGH
ADV# LOW to output valid
t
VLQV
ns
ns
ns
ns
ns
1, 2
1
1, 3
1, 2, 3
1, 3
ns
ns
ns
ns
1
1, 3
1
1, 3
t
AVVH
t
ELVH
ns
ns
1
1
Easy BGA
QUAD+
TSOP
t
VLVH
t
VHVL
t
VHAX
t
APA
t
PHVH
ADV# pulse width LOW
ADV# pulse width HIGH
Address hold from ADV# HIGH
Page address access
RST# HIGH to ADV# HIGH
Clock Specifications
10
10
9
–
30
–
–
–
25
-
ns
ns
ns
1
1, 4
1
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p30_65nm_MLC_256Mb-512mb.pdf - Rev. C 12/13 EN
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