512Mb, 1Gb, 2Gb: P30-65nm
AC Write Specifications
Figure 37: Write to Synchronous Read Timing
Latency count
t
AVQV
t
VLCH
t
AVCH
CLK
t
AVWH
t
WHAX
t
CHAX
A
t
VLVH
t
VHAX
ADV#
t
ELWL
t
WHEH
t
EHEL
t
ELCH
CE#
t
WHAV
t
WHCH/L
t
WLWH
t
WHVH
WE#
t
GLQV
OE#
t
GLTX
t
CHTV
t
CHQV
t
CHQX
t
CHQV
WAIT
t
DVWH
t
WHDX
t
ELQV
DQ
t
PHWL
D
Q
Q
RST#
Note:
1. WAIT shown de-asserted and High-Z per OE# de-assertion during WRITE operation
(RCR10 = 0, WAIT asserted LOW).
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p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN
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