64Mb: 4 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
Configuration Registers
Refresh Configuration Register
The refresh configuration register (RCR) defines how the CellularRAM device performs
its transparent self refresh. Altering the refresh parameters can dramatically reduce cur-
rent consumption during standby mode. Page mode control is also embedded into the
RCR. Figure 22 describes the control bits used in the RCR. At power-up, the RCR is set to
0070h.
The RCR is accessed using CRE and A[19] LOW; or through the configuration register
software access sequence with DQ = 0000h on the third cycle (see “Configuration Regis-
Figure 22:
Refresh Configuration Register Mapping
A[21:20]
A19
A[18:8]
A7
A6
A5
A4
A3
A2
A1
A0
Address Bus
21–20
19
18–8
7
6
5
4
3
2
1
0
Register
RESERVED Select
Read Configuration
Register
RESERVED
PAGE
TCR
DPD
RESERVED
PAR
All must be set to "0" All must be set to "0"
Must be set to "0"
RCR[2]
0
RCR[1]
0
0
1
1
0
0
1
1
RCR[0]
0
1
0
1
0
1
0
1
Refresh Coverage
Full array (default)
Bottom 1/2 array
Bottom 1/4 array
Bottom 1/8 array
None of array
Top 1/2 array
Top 1/4 array
Top 1/8 array
RCR[19]
0
1
Register Select
Select RCR
Select BCR
0
0
0
1
RCR[7]
0
1
Page Mode Enable/Disable
Page Mode Disabled (default)
Page Mode Enable
1
1
1
RCR[6] RCR[5]
1
0
0
1
1
0
1
0
Maximum Case Temp.
+85˚C (default)
+70˚C
+45˚C
+15˚C
RCR[4]
0
1
Deep Power-Down
DPD Enable
DPD Disable (default)
PDF: 09005aef80be1fbd/Source: 09005aef80be2036
Burst CellularRAM_2.fm - Rev. G 10/05 EN
26
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc. All rights reserved.
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