MT8981D
ISO-CMOS
NC
STi2
STi1
STi0
DTA
IC
ODE
STo0
STo1
STo2
NC
6
5
4
3
2
1
44
43
42
41
40
18
19
20
21
22
23
24
25
26
27
28
NC
A3
A4
A5
DS
R/W
CS
D7
D6
D5
NC
44 PIN PLCC
DTA
STi0
STi1
STi2
STi3
IC
IC
IC
IC
VDD
F0i
C4i
A0
A1
A2
A3
A4
A5
DS
R/W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
IC
ODE
STo0
STo1
STo2
STo3
IC
IC
IC
IC
VSS
D0
D1
D2
D3
D4
D5
D6
D7
CS
40 PIN CERDIP/PLASTIC DIP
Figure 2 - Pin Connections
Pin Description
Pin #
40
DIP
44
44
PLCC QFP
Name
Description
1
2
40
DTA
Data Acknowledgement (Open Drain Output).
This is the data acknowledgement
on the microprocessor interface. This pin is pulled low to signal that the chip has
processed the data. A 909
Ω,
1/4W, resistor is recommended to be used as a pullup.
2-4
5
6-9
10
11
3-5
7
8-11
12
13
41-
43
1
2-5
6
7
STi0-
ST-BUS Input 0 to 2 (Inputs).
These are the inputs for the 2048 kbit/s ST-BUS input
STi2 streams.
STi3
IC
V
DD
F0i
ST-BUS Input 3 (Input).
These are the inputs for the 2048 kbit/s ST-BUS input
streams.
Internal Connections.
Must be connected to V
DD
.
Power Input.
Positive Supply.
Framing 0-Type (Input).
This is the input for the frame synchronization pulse
for the 2048 kbit/s ST-BUS streams. A low on this input causes the internal counter
to reset on the next negative transition of C4i.
2-18
NC
A3
A4
A5
DS
R/W
CS
D7
D6
D5
NC
44 PIN QFP
12
13
14
15
16
17
18
19
20
21
22
STi3
IC
IC
IC
IC
VDD
F0i
C4i
A0
A1
A2
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
STo3
IC
IC
IC
IC
VSS
D0
D1
D2
D3
D4
STi3
IC
IC
IC
IC
VDD
F0i
C4i
A0
A1
A2
1
2
3
4
5
6
7
8
9
10
11
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
STo3
IC
IC
IC
IC
VSS
D0
D1
D2
D3
D4
NC
STi2
STi1
STi0
DTA
IC
ODE
STo0
STo1
STo2
NC
MITEL [ MITEL NETWORKS CORPORATION ]
