Advance Information
MT91L60/61
IRQ
Microport Read/Write Access
FP
n-3
n-2
n-1
n
n+1
n+2
n+3
n+4*
DSTo/
DSTi
Di-bit Group
Receive
D0
D-Channel
I
II
D1 D2
D3
No preset value
D4
III
IV
D5 D6
D7
Di-bit Group
Transmit
D0
D-Channel
I
D1 D2
II
D3
D4
III
D5 D6
IV
D7
Power-up reset to 1111 1111
* note that frame n+4 is equivalent to frame n of the next cycle.
Figure 7a - D-Channel 16 kb/s Operation
FP
C4i
C2
t
ir
=500 nsec max
R
pullup
= 10 k
t
if
=500 nsec max
IRQ
8 kb/s operation
16 kb/s operation
Microport Read/Write Access
Reset coincident with
Read/Write of Address 04 Hex
or next FP, whichever occurs first
DSTo/
DSTi
D0
D1
Figure 7b - IRQ Timing Diagram
IRQ
Microport Read/Write Access
FP
n-7
n-6
n-5
n-4
n-3
n-2
n-1
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
n+8
D-Channel
Di-bit Group
Receive
D-Channel
I
D0
II
D1
III
D2
IV
D3
V
D4
VI
D5
VII
D6
VIII
D7
I
D0
II
D1
III
D2
IV
D3
V
D4
VI
D5
VII
D6
VIII
D7
No preset value
Di-bit Group
Transmit
D-Channel
Power-up reset to 1111 1111
Figure 7c - D-Channel 8 kb/s Operation
9
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