MITSUBISHI <DIGITAL ASSP>
M66282FP
8192 x 8-BIT LINE MEMORY
SWITCHING CHARACTERISTICS
(Ta=0 – 70
°C,
Vcc=2.7 – 3.6V, GND=0V unless otherwise noted)
Symbol
t
AC
t
OH
t
OEN
t
ODIS
Access time
Output hold time
Output enable time
Output disable time
Parameter
Min.
3
3
3
Limits
Typ.
Max.
18
18
18
Unit
ns
ns
ns
ns
TIMING REQUIREMENTS
(Ta=0 – 70
°C,
Vcc=2.7 – 3.6V, GND=0V unless otherwise noted)
Symbol
t
WCK
t
WCKH
t
WCKL
t
RCK
t
RCKH
t
RCKL
t
DS
t
DH
t
RESS
t
RESH
t
NRESS
t
NRESH
t
WES
t
WEH
t
NWES
t
NWEH
t
RES
t
REH
t
NRES
t
NREH
t
r
, t
f
t
H
Parameter
Write clock (WCK) cycle
Write clock (WCK) "H" pulse width
Write clock (WCK) "L" pulse width
Read clock (RCK) cycle
Read clock (RCK) "H" pulse width
Read clock (RCK) "L" pulse width
Input data set up time for WCK
Input data hold time for WCK
Reset set up time for WCK/RCK
Reset hold time for WCK/RCK
Reset non-selection set up time for WCK/RCK
Reset non-selection hold time for WCK/RCK
WEB set up time for WCK
WEB hold time for WCK
WEB non-selection set up time for WCK
WEB non-selection hold time for WCK
REB set up time for RCK
REB hold time for RCK
REB non-selection set up time for RCK
REB non-selection hold time for RCK
Input pulse up/down time
Data hold time (Note 1)
Min.
25
11
11
25
11
11
7
3
7
3
7
3
7
3
7
3
7
3
7
3
Limits
Typ.
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
20
20
Note 1: For 1 line access, the following conditions must be satisfied:
WEB high-level period
≤
20 ms - 8192 • t
WCK
- WRESB low-level period
REB high-level period
≤
20 ms - 8192 • t
RCK
- RRESB low-level period
2: Perform reset operation after turning on power supply.
4
MITSUBISHI [ MITSUBISHI ELECTRIC SEMICONDUCTOR ]
