M25PX64
Instructions
6.7
Read data bytes at higher speed (FAST_READ)
The device is first selected by driving Chip Select (S) Low. The instruction code for the read
data bytes at higher speed (FAST_READ) instruction is followed by a 3-byte address (A23-
A0) and a dummy byte, each bit being latched-in during the rising edge of Serial Clock (C).
Then the memory contents, at that address, are shifted out on serial data output (DQ1) at a
maximum frequency f
C
, during the falling edge of Serial Clock (C).
The instruction sequence is shown in
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out. The whole memory can,
therefore, be read with a single read data bytes at higher speed (FAST_READ) instruction.
When the highest address is reached, the address counter rolls over to 000000h, allowing
the read sequence to be continued indefinitely.
The read data bytes at higher speed (FAST_READ) instruction is terminated by driving Chip
Select (S) High. Chip Select (S) can be driven High at any time during data output. Any read
data bytes at higher speed (FAST_READ) instruction, while an erase, program or write cycle
is in progress, is rejected without having any effects on the cycle that is in progress.
Figure 14. Read data bytes at higher speed (FAST_READ) instruction sequence
and data-out sequence
S
0
C
Instruction
24-bit address
(1)
1
2
3
4
5
6
7
8
9 10
28 29 30 31
DQ0
High Impedance
DQ1
23 22 21
3
2
1
0
S
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
C
Dummy byte
DQ0
7
6
5
4
3
2
1
0
DATA OUT 1
DATA OUT 2
1
0
7
MSB
6
5
4
3
2
1
0
7
MSB
AI13737b
DQ1
7
MSB
6
5
4
3
2
1. Address bit A23 is don’t care.
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NUMONYX [ NUMONYX B.V ]
