M29W800DT, M29W800DB
Signal descriptions
2.7
Write enable (W)
The write enable, W, controls the bus write operation of the memory’s command interface.
2.8
Reset/block temporary unprotect (RP)
The reset/block temporary unprotect pin can be used to apply a hardware reset to the
memory or to temporarily unprotect all blocks that have been protected.
A hardware reset is achieved by holding reset/block temporary unprotect Low, V
IL
, for at
least t
PLPX
. After reset/block temporary unprotect goes High, V
IH
, the memory will be ready
for bus read and bus write operations after t
PHEL
or t
RHEL
, whichever occurs last. See the
and
for more
details.
Holding RP at V
ID
will temporarily unprotect the protected blocks in the memory. Program
and erase operations on all blocks will be possible. The transition from V
IH
to V
ID
must be
slower than t
PHPHH
.
2.9
Ready/busy output (RB)
The ready/busy pin is an open-drain output that can be used to identify when the device is
performing a program or erase operation. During program or erase operations ready/busy is
Low, V
OL
. Ready/busy is high-impedance during read mode, auto select mode and erase
suspend mode.
After a hardware reset, bus read and bus write operations cannot begin until ready/busy
becomes high-impedance. See
and
The use of an open-drain output allows the ready/busy pins from several memories to be
connected to a single pull-up resistor. A Low will then indicate that one, or more, of the
memories is busy.
2.10
Byte/word organization select (BYTE)
The byte/word organization select pin is used to switch between the 8-bit and 16-bit bus
modes of the memory. When byte/word organization select is Low, V
IL
, the memory is in 8-
bit mode, when it is High, V
IH
, the memory is in 16-bit mode.
2.11
V
CC
supply voltage
The V
CC
supply voltage supplies the power for all operations (read, program, erase etc.).
The command interface is disabled when the V
CC
supply voltage is less than the lockout
voltage, V
LKO
. This prevents bus write operations from accidentally damaging the data
during power-up, power-down and power surges. If the program/erase controller is
programming or erasing during this time then the operation aborts and the memory contents
being altered will be invalid.
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