M58LT128HST, M58LT128HSB
Table 38.
Bank and Erase Block region information
(1) (2)
Flash memory (bottom)
Common Flash Interface
Flash memory (top)
Offset
(P+23)h = 12Dh
Data
02h
Description
Offset
(P+23)h = 12Dh
Data
02h
Number of bank regions within the device
1. The variable P is a pointer which is defined at CFI offset 015h.
2. Bank regions. There are two bank regions, see
and
Table 39.
Bank and Erase Block region 1 information
M58LT128HSB
(bottom)
Offset
(P+24)h = 12Eh
(P+25)h = 12Fh
Data
01h
Number of identical banks within bank region 1
00h
Number of program or erase operations allowed
in bank region 1:
Bits 0-3: Number of simultaneous Program
operations
Bits 4-7: Number of simultaneous Erase
operations
Number of Program or Erase operations allowed
in other banks while a bank in same region is
programming
Bits 0-3: Number of simultaneous Program
operations
Bits 4-7: Number of simultaneous Erase
operations
Number of Program or Erase operations allowed
in other banks while a bank in this region is
erasing
Bits 0-3: Number of simultaneous Program
operations
Bits 4-7: Number of simultaneous Erase
operations
Types of Erase Block regions in bank region 1
n = number of Erase Block regions with
contiguous same-size erase blocks.
Symmetrically blocked banks have one blocking
region
(2)
.
Bank region 1 Erase Block Type 1 Information
Bits 0-15: n+1 = number of identical size erase
blocks
Bits 16-31: n×256 = number of bytes in Erase
Block region
Bank region 1 (Erase Block Type 1)
Minimum block erase cycles × 1000
Description
M58LT128HST (top)
Offset
(P+24)h = 12Eh
(P+25)h = 12Fh
Data
0Fh
00h
(P+26)h = 130h
11h
(P+26)h = 130h
11h
(P+27)h = 131h
00h
(P+27)h = 131h
00h
(P+28)h = 132h
00h
(P+28)h = 132h
00h
(P+29)h = 133h
01h
(P+29)h = 133h
02h
(P+2A)h = 134h
(P+2B)h = 135h
(P+2C)h = 136h
(P+2D)h = 137h
(P+2E)h = 138h
(P+2F)h = 139h
07h
00h
00h
02h
64h
00h
(P+2A)h = 134h
(P+2B)h = 135h
(P+2C)h = 136h
(P+2D)h = 137h
(P+2E)h = 138h
(P+2F)h = 139h
03h
00h
80h
00h
64h
00h
87/110
NUMONYX [ NUMONYX B.V ]
