Common Flash Interface
M58LT128HST, M58LT128HSB
Table 40. Bank and Erase Block region 2 Information (continued)
M58LT128HSB
(bottom)
M58LT128HST (top)
Offset Data
Description
Offset
Data
Bank region 2 (Erase Block type 1):Page mode
and Synchronous mode capabilities (defined in
Table 37)
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
(P+3F)h = 149h 03h (P+47)h = 151h 03h
(P+40)h = 14Ah 03h
(P+41)h = 14Bh 00h
(P+42)h = 14Ch 80h
(P+43)h = 14Dh 00h
(P+44)h = 14Eh 64h
(P+45)h = 14Fh 00h
Bank region 2 Erase Block type 2 Information
Bits 0-15: n+1 = number of same-size erase
blocks
Bits 16-31: n × 256 = number of bytes in Erase
Block region
Bank region 2 (Erase Block type 2)
Minimum Block Erase cycles × 1000
Bank region 2 (Erase Block type 2): BIts per cell,
internal ECC
Bits 0-3: bits per cell in Erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(P+46)h = 150h 01h
Bank region 2 (Erase Block type 2): Page mode
and Synchronous mode capabilities (defined in
Table 37)
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
(P+47)h = 151h 03h
(P+48)h = 152h
(P+49)h = 153h
(P+48)h = 152h
(P+43)h = 153h
Feature Space definitions
Reserved
1. The variable P is a pointer which is defined at CFI offset 015h.
2. Bank regions. There are two bank regions, see Table 29 and Table 30.
90/110