Common Flash Interface
M58LT128HST, M58LT128HSB
Table 39. Bank and Erase Block region 1 information (continued)
M58LT128HSB
(bottom)
M58LT128HST (top)
Offset Data
Description
Offset
Data
Bank region 1 (Erase Block Type 1): bits per cell,
internal ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(P+30)h = 13Ah 01h (P+30)h = 13Ah 01h
Bank region 1 (Erase Block Type 1): Page mode
and Synchronous mode capabilities
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
(P+31)h = 13Bh 03h (P+31)h = 13Bh 03h
(P+32)h = 13Ch 06h Bank region 1 Erase Block Type 2 Information
Bits 0-15: n+1 = number of identical size Erase
Blocks
(P+33)h = 13Dh 00h
(P+34)h = 13Eh 00h
Bits 16-31: n×256 = number of bytes in Erase
(P+35)h = 13Fh 02h Block region
(P+36)h = 140h 64h
(P+37)h = 141h 00h
Bank region 1 (Erase Block Type 2)
Minimum Block Erase cycles × 1000
Bank regions 1 (Erase Block Type 2): BIts per
cell, internal ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
(P+38)h = 142h 01h
(P+39)h = 143h 03h
Bank region 1 (Erase Block Type 2): Page mode
and Synchronous mode capabilities
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
1. The variable P is a pointer which is defined at CFI offset 015h.
2. Bank regions. There are two bank regions, see Table 29 to Table 30.
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NUMONYX [ NUMONYX B.V ]
