P30
Table 8:
Discrete Bottom Parameter Memory Maps (all packages)
Size
(KB)
128
Blk
10
...
64-Mbit
070000 - 07FFFF
One
Programming
Region
...
Size
(KB)
128
...
Blk
10
...
128-Mbit
070000 - 07FFFF
...
010000 - 01FFFF
00C000 - 00FFFF
...
000000 - 003FFF
Address Range
1FFC000 - 1FFFFFF
...
1FF0000 - 1FF3FFF
1FE0000 - 1FEFFFF
...
1000000 - 100FFFF
FF0000 - FFFFFF
One
Programming
Region
128
32
...
...
4
3
...
010000 - 01FFFF
00C000 - 00FFFF
...
128
32
...
4
3
...
0
32
0
000000 - 003FFF
32
Size
(KB)
Thirty-One
Programming
Regions
128
128
...
Blk
258
257
...
256-Mbit
FF0000 - FFFFFF
FE0000 - FEFFFF
...
090000 - 09FFFF
080000 - 08FFFF
070000 - 07FFFF
...
010000 - 01FFFF
00C000 - 00FFFF
...
000000 - 003FFF
512-Mbit Flash (2x256-Mbit w/ 1CE)
128
128
128
12
11
10
...
4
3
...
0
One
Programming
Region
128
32
...
32
Block size is referenced in K-Bytes where a byte=8 bits. Block Address range is referenced in K-
Words where a Word is the size of the flash output bus (16 bits).
Note:
The Dual- Die P30 memory maps are the same for both parameter options because the
devices employ virtual chip enable (Refer to
The parameter option only defines
the placement of bottom parameter die.
512-Mbit Top and Bottom Parameter Memory Map (Easy BGA and QUAD+ SCSP)
(Sheet 1 of 2)
Table 9:
...
Die Stack Config
Size
(KB)
32
...
Blk
517
...
256-Mbit
Top Parameter Die
32
128
...
128
128
514
513
...
259
258
November 2007
Order Number: 306666-11
Datasheet
23