PE9601
Product Specification
Table 6. AC Characteristics
V
DD
= 3.0 V, -40° C < T
A
< 85° C, unless otherwise specified
Symbol
Parameter
Test Program Name
Conditions
Min
Max
Units
Control Interface and Latches (see Figure 5 and Figure 6)
f
Clk
t
ClkH
t
ClkL
t
DSU
Serial data clock frequency
Serial clock HIGH time
Serial clock LOW time
Sdata set-up time after Sclk rising
edge, D[7:0] set-up time to
M1_WR, M2_WR, A_WR, E_WR
rising edge
Sdata hold time after Sclk rising
edge, D[7:0] hold time to M1_WR,
M2_WR, A_WR rising edge
S_WR, M1_WR, M2_WR, A_WR,
E_WR pulse width
(Note 1)
t_clk_H (s)
t_clk_L (s)
t_dsu_”xxx” (s) where
“xxx” is name of pin being
tested
t_dhid_”xxx” (s) where
“xxx” is name of pin being
tested
t_pw_”xxx” (s) where “xxx”
is name of pin being
tested
t_cwr_”xxx” (s) where
“xxx” is name of pin being
tested
t_ce (s)
t_wrc_”xxx” (s) where
“xxx” is name of pin being
tested
t_ec (s)
30
30
10
10
MHz
ns
ns
ns
t
DHLD
10
ns
t
PW
30
ns
Sclk rising edge to S_WR rising
edge. S_WR, M1_WR, M2_WR,
A_WR falling edge to Hop_WR
rising edge
Sclk falling edge to E_WR
t
CE
transition
S_WR falling edge to Sclk rising
t
WRC
edge. Hop_WR falling edge to
S_WR, M1_WR, M2_WR, A_WR
rising edge
E_WR transition to Sclk rising
t
EC
edge
Main Divider (Including Prescaler)
t
CWR
F
in
P
Fin
Operating frequency
Input level range
30
ns
30
30
ns
ns
30
ns
RF_sens
RF_sens
External AC coupling
200
0
2200
5
MHz
dBm
Main Divider (Prescaler Bypassed)
F
in
P
Fin
Operating frequency
Input level range
External AC coupling
20
-5
220
5
MHz
dBm
Reference Divider
f
r
P
fr
Phase Detector
f
c
Note 1:
Comparison frequency
(Note 3)
20
MHz
Operating frequency
Reference input power (Note 2)
Fc_sens
Fc_sens
(Note 3)
Single ended input
-2
100
MHz
dBm
Fclk is verified during the functional pattern test. Serial programming sections of the functional pattern are clocked at 10 MHz to verify Fclk
specification.
CMOS logic levels can be used to drive reference input if DC coupled. Voltage input needs to be a minimum of 0.5V
p-p
.
Parameter is guaranteed through characterization only and is not tested.
Note 2:
Note 3:
Document No. 70-0025-05
│
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©2005 Peregrine Semiconductor Corp. All rights reserved.
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