PI6CU877NFE 参数 Datasheet PDF下载

PI6CU877

PLL Clock Driver for

1.8V DDR2 Memory

Timing Requirements

(Over recommended operating free-air temperature)

Symbol

FCK

t

DC

t

L

t

OFF

Decription

Operation clock frequency

(7, 8)

Application clock frequency

(7, 9)

Input clock duty cycle

Stabalization time

(10)

Device power down

(10)

AV

DD

, V

DDQ

= 1.8V ±0.1V

Min.

25

160

40

Max.

300

270

60

15

8

Units

MHz

%

µs

ns

Notes:

7. The PLL is able to handle spread spectrum induced skew.

8. Operating clock frequency indicates a range over which the PLL is able to lock, but in which it is not required to meet the other

timing parameters. (Used for low-speed debug).

9. Application clock frequency indicates a range over which the PLL must meet all timing parameters.

10. Stabilization time is the time required for the integrated PLL circuit to obtain phase lock of its feedback signal to its reference

signal after power up . During normal operation, the stabilization time is also the time required for the integrated PLL circuit to

obtain phase lock of its feedback signal to its reference signal when CK and CK go to a logic low state, enter the power-down

mode and later return to active operation. CK and CK maybe left floating after they have been driven low for one complete clock cycle.

DC Specifications

Param-

eter

V

IK

V

OH

I

ODL

V

OD

I

I

I

DDLD

I

DD

All Inputs

HIGH output voltage

Output disabled low current

Description

Test Condition

I

I

= -18mA

I

OH

= -100µA

I

OH

= -9mA

OE = L, V

ODL

= 100mV

1.7V

Output differenital voltage, the magniture of the difference

between the true and complimentary outputs, see fig. 9 for

dimentions

CK, CK

OE, OS, FB

IN

, FB

IN

Static Supple current, I

DDQ

+ I

ADD

Dynamic supply current, I

DDQ

+

I

ADD

, see note 6 for CPD calcula-

tion

CK, CK

FB

IN

, FB

IN

CK, CK

FB

IN

, FB

IN

V

I

= V

DDQ

or GND

V

I

= V

DDQ

or GND

CK and CK = L

CK and CK = 270MHz,

all outputs are open (not

connected to a PCB)

V

I

= V

DDQ

or GND

V

I

= V

DDQ

or GND

V

I

= V

DDQ

or GND

V

I

= V

DDQ

or GND

1.8V

1.9V

AV

DD

,

V

DDQ

1.7V

1.7 to

1.9V

1.7

V

DDQ

-0.2

1.1

100

0.6

±250

±10

500

300

2

2

3

3

0.25

0.25

pF

mA

µA

µA

V

Min.

Typ.

Max.

1.2

V

Units

CI

CI(∆)

Notes:

6. Total I

DD

= I

DDQ +

I

ADD

= F

CK

*C

PD

*V

DDQ

, solving for C

PD

= (I

DDQ

+ I

ADD

)/(F

CK

*V

DDQ

) where F

CK

is the input frequency, V

DDQ

is the

power supply and C

PD

is the Power Dissipation Capacitance.

5

PS8689B

08/05/04