Analog Frequency Multiplier
PL560-xx VCXO Family
LVDS ELECTRICAL CHARACTERISTICS
PARAMETERS
Supply Current (with loaded outputs)
Operating Voltage
Output Clock Duty Cycle
Short Circuit Current
Output Differential Voltage
VDD Magnitude Change
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
Power-off Leakage
Output Short Circuit Current
Differential Clock Rise Time
Differential Clock Fall Time
V
OD
∆V
OD
V
OH
V
OL
V
OS
∆V
OS
I
OXD
I
OSD
t
r
t
f
R
L
= 100
CL = 10 pF
(see figure)
0.2
0.2
V
out
= V
DD
or GND
VDD = 0V
R
L
= 100
(see figure)
247
-50
1.4
0.9
1.125
0
1.1
1.2
3
±1
-5.7
0.5
0.5
LVDS Transition Time Waveform
SYMBOL
I
DD
V
DD
CONDITIONS
Fout = 622 MHz
MIN.
TYP.
55
MAX.
60
3.63
UNITS
mA
V
%
mA
2.25
@ 1.25V (LVDS)
45
50
±50
355
55
454
50
1.6
mV
mV
V
V
1.375
25
±10
-8
0.7
0.7
V
mV
A
mA
ns
ns
LVDS Levels Test Circuit
OUT
LVDS Switching Test Circuit
OUT
OUT
0V (Differential)
OUT
50Ω
C
L
= 10pF
V
OD
V
OS
V
DIFF
R
L
= 100Ω
V
DIFF
0V
20%
80%
80%
50Ω
C
L
= 10pF
OUT
OUT
t
R
t
F
20%
47745 Fremont Blvd., Fremont, CA 94538 TEL (510) 492-0990, FAX (510) 492-0991
Rev.:02-09-07 Page 10
PLL [ PHASELINK CORPORATION ]
