PLL103-02 Rev.D
DDR SDRAM Buffer for Desktop PCs with 4 DDR DIMMS
3. Electrical Specifications (Continued)
PARAMETERS
Supply Current
Output Crossing
Voltage
Output Voltage
Swing
Duty Cycle
Max. Operating
Frequency
Rising Edge Rate
Falling Edge Rate
Clock Skew ( pin to
pin )
Stabilization Time
Note:
TBM: To be measured
SYMBOL
I
DDS
V
OC
V
OUT
D
T
PD = 0
CONDITIONS
MIN.
(VDD/2)
-0.1
1.1
TYP.
MAX.
TBM
(VDD/2)+
0.1
VDD-0.4
UNITS
mA
V
V
%
MHz
V/ns
V/ns
ps
ms
VDD/2
Measured @ 1.5V
45
66
50
55
170
T
OR
T
OF
T
SKEW
T
ST
Measured @
Measured @
0.4V ~ 2.4V
2.4V ~ 0.4V
1.0
1.0
1.5
1.5
2.0
2.0
100
0.1
All outputs equally loaded
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Rev 01/11/01 Page 6