RELEASED
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
4.4.2.7 CRC Error Interrupts
Symbol:
XCRC
Address Offset: 00018h
Default Value: 00000000h
Access:
Read and Clear
Interrupt Register for per-port CRC errors
Bits
Description
CRC Error Interrupts. Each bit indicates if a CRC error has occurred on the appropriate link
(DS to XBAR) since the last time this register was read. Mask off unwanted (unused ports) bits
via the CRC Error Interrupt Mask.
31:0
4.4.2.8 RDY Inactive Interrupts Mask
Symbol: XRDYDMSK
Address Offset: 0001Ch
Default Value: 00000000h
Access:
Read/Write
Interrupt Mask for per-port RDY down signals.
Bits
Description
RDY Inactive Interrupts Mask. Each bit is used to mask (enable) interrupts when the
corresponding bit in the Link Ready Inactive register is set to 1. The interrupt is enabled when
the bit is 1.
31:0
232
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
PMC [ PMC-SIERRA, INC ]
