RELEASED
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
4.4.2.9 Link RDY Inactive Interrupts
Symbol: XRDYDN
Address Offset: 00020h
Default Value: 00000000h
Access:
Read and Clear
Interrupt Register for per-port RDY down signals.
NOTE: The link may be up again (active) by the time the CPU reads this register. Mask off
unwanted (unused ports) bits via the Link Ready Inactive Interrupts Mask. Reading this
register clears all bits.
Bits
Description
Link RDY Inactive Interrupts. Each bit indicates if the Ready signal from a link has
transitioned from Active to Inactive (the link has gone down for some reason).
31:0
4.4.2.10 Link RDY Active Interrupts Mask
Symbol: XRDYUMSK
Address Offset: 00024h
Default Value: 00000000h
Access:
Read/Write
Interrupt Mask for per-port RDY up signals.
Bits
Description
Link RDY Active Interrupts Mask. Each bit is used to mask (enable) interrupts when the
corresponding bit in the Link Ready Active register is set to 1. The interrupt is enabled when the
bit is 1.
31:0
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
233
PMC [ PMC-SIERRA, INC ]
