November 2006
rev 1.5
Switching Characteristics for ASM5P2308A Commercial Temperature Devices
Parameter
1/t
1
1/t
1
t
1/
ASM5P2308A
Description
Output Frequency
Output Frequency
Output Frequency
Duty Cycle = (t
2
/ t
1
) * 100
(-1, -2, -3, -4, -1H, -5H)
Duty Cycle = (t
2
/ t
1
) * 100
(-1, -2, -3, -4, -1H, -5H)
Output Rise Time
(-1, -2, -3, -4)
Output Rise Time
(-1, -2, -3, -4)
Output Rise Time
(-1H, -5H)
Output Fall Time
(-1, -2, -3, -4)
Output Fall Time
(-1, -2, -3, -4)
Output Fall Time
(-1H, -5H)
Output-to-output skew on same
bank (-1, -2, -3, -4)
(-1H, -5H)
Output bank A -to- output
Bank B skew (-1, -4, -5H)
Output bank A -to- output
Bank B skew (-2, -3)
Delay, REF Rising Edge to FBK
Rising Edge
9
9
9
9
9
9
9
9
9
9
9
Test Conditions
30pF load, All devices
20pF load, -1H, -5H devices
8
Min
15
15
15
40.0
45.0
Typ
Max
100
133
133
Unit
MHz
MHz
MHz
%
%
nS
nS
nS
nS
nS
nS
pS
15pF load, -1, -2, -3, -4 devices
Measured at 1.4V, F
OUT
= <66.66MHz
30pF load
Measured at 1.4V, F
OUT
= <50MHz
15pF load
Measured between 0.8V and 2.0V 30pF load
Measured between 0.8V and 2.0V 15pF load
Measured between 0.8V and 2.0V 30pF load
Measured between 2.0V and 0.8V 30pF load
Measured between 0.8V and 2.0V 15pF load
Measured between 2.0V and 0.8V 30pF load
All outputs equally loaded
All outputs equally loaded
All outputs equally loaded
All outputs equally loaded
Measured at V
DD
/2
Measured at V
DD
/2 on the FBK pins of the device
Measured at 66.67MHz, loaded outputs, 15pF load
50.0
50.0
60.0
55.0
2.20
1.50
1.50
2.20
1.50
1.25
200
200
200
400
t
3
t
3
t
3
t
4
t
4
t
4
Output-to-output skew
t
5
t
6
t
7
0
0
±250
700
200
200
100
400
400
1.0
pS
pS
pS
Device-to-Device Skew
t
J
Cycle-to-cycle jitter
(-1, -1H, -4, -5H)
9
Measured at 66.67MHz, loaded outputs, 30pF load
Measured at 133.3MHz, loaded outputs, 15pF
load
t
J
Cycle-to-cycle jitter
(-2, -3)
9
9
Measured at 66.67MHz, loaded outputs, 30pF load
Measured at 66.67MHz, loaded outputs, 15pF
load
Stable power supply, valid clock presented on REF
and FBK pins
pS
t
LOCK
PLL Lock Time
mS
Note:
9. Parameter is guaranteed by design and characterization. Not 100% tested in production.
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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