November 2006
rev 1.4
Pin Configuration
REF
CLKA1
CLKA2
GND
1
2
3
4
8
FBK
ASM5P23S04A
ASM5P23S04A
7
6
V
DD
CLKB2
5
CLKB1
Pin Description for ASM5P23S04A
Pin #
1
2
3
4
5
6
7
8
Pin Name
REF
1
CLKA1
2
CLKA2
2
GND
CLKB1
2
CLKB2
2
V
DD
FBK
Description
Input reference frequency, 5V tolerant input
Buffered clock output, bank A
Buffered clock output, bank A
Ground
Buffered clock output, bank B
Buffered clock output, bank B
3.3V supply
PLL feedback input
Notes:
1. Weak pull-down.
2. Weak pull-down on all outputs.
3.3 ‘SpreadTrak’ Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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