September 2006
rev 0.4
DC Electrical Specifications
(VDD = 2.5V ± 5%, T
A
= -40°C to +85°C)
Parameter
V
IL
V
IH
V
OL
V
OH
I
IL
I
IH
I
DDA
I
DDQ
I
DD
C
IN
Z
OUT
PCS5I9774
Description
Input Voltage, Low
Input Voltage, High
Output Voltage, Low
1
Output Voltage, High
1
Input Current, Low
2
Input Current, High
2
PLL Supply Current
Quiescent Supply Current
Dynamic Supply Current
Input Pin Capacitance
Output Impedance
Condition
LVCMOS
LVCMOS
I
OL
= 15mA
I
OH
= –15mA
V
IL
= VSS
V
IL
= VDD
AVDD only
All VDD pins except AVDD
Outputs loaded @ 100MHz
Min
1.7
1.8
Typ
Max
0.7
VDD+0.3
0.6
-100
100
Unit
V
V
V
V
µA
µA
mA
mA
mA
pF
5
135
4
14
18
10
8
22
Ω
Note: 1. Driving one 50Ωparallel-terminated transmission line to a termination voltage of V
TT
. Alternatively, each output
terminated transmission lines
2. Inputs have pull-up or pull-down resistors that affect the input current.
drives up to two 50
Ωseries-
DC Electrical Specifications
(VDD= 3.3V ± 5%, T
A
= -40°C to +85°C)
Parameter
V
IL
V
IH
V
OL
V
OH
I
IL
I
IH
I
DDA
I
DDQ
I
DD
C
IN
Z
OUT
Description
Input Voltage, Low
Input Voltage, High
Output Voltage, Low
1
Output Voltage, High
1
Input Current, Low
2
Input Current, High
2
Condition
LVCMOS
LVCMOS
I
OL
= 24 mA
I
OL
= 12 mA
I
OH
=-24 mA
V
IL
= VSS
V
IL
= VDD
AVDD only
All VDD pins except AVDD
Outputs loaded @ 100MHz
Min
2.0
Typ
Max
0.8
VDD + 0.3
0.55
0.30
Unit
V
V
V
V
µA
µA
mA
mA
mA
pF
2.4
-100
100
5
225
4
12
15
18
10
8
PLL Supply Current
Quiescent Supply Current
Dynamic Supply Current
Input Pin Capacitance
Output Impedance
Ω
Note: 1. Driving one 50Ω parallel-terminated transmission line to a termination voltage of V
TT
. Alternatively, each output drives up to two 50Ω series-terminated
transmission lines
2. Inputs have pull-up or pull-down resistors that affect the input current.
2.5V or 3.3V, 200-MHz, 12-Output Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
6 of 12
PULSECORE [ PulseCore Semiconductor ]
