PACE1754
AC ELECTRICAL CHARACTERISTICS
1, 2
(V
CC
= 5V ± 10% Over Recommended Operating Conditions)
20 MHz
Symbol
tEX RDY (RDYD)
V
tC (RDYD)
V
tSTRBA
H
(A)
V
tIBA
V
(A)
V
tFC (R)
L
tSTRBD
H
(R)
H
tSTRBD
L
(W)
L
tSTRBD
H
(W)
H
tIBD
IN
(ME
PA ER)
L
tIBA
IN
(EX
AD ER)
tSTRBD
L
–
(STRT ROM)
V
tFC (IB OUT)
V
tC (TIMER CLK)
tIB IN
V
(IB16)
tEXT AD (CLKB3)
tEX
RDY1
(RDYD)
V
tFC (SCR
EN)
tSTRBD
H
(SCR
EN)
Parameter
Time from External Ready to
Ready Data Valid
Time from Clock Read to
Ready Data Valid
Time from Strobe Address HIGH to
Address Bus Valid
Time from Information Bus Address to
Address Bus Valid
Time from Falling Clock to
Read LOW
Time from Strobe Data HIGH to
Read HIGH
Time from Strobe Data LOW to
Write LOW
Time from Strobe Data HIGH to
Write HIGH
Time from Information Bus Data into
Memory Parity Error LOW
Time from Information Bus Address into
External Address Error
Time from Strobe Data LOW to
Start-up ROM Valid
Time from Falling Clock to
Information Bus Valid
Time from Rising Edge of Clock to
Timer Clock
Time from Information Bus Data to
Parity Valid
Extended Address
Setup Time
Time from External Ready Data to
Ready Data Valid
Time from Falling Clock to SCR Enable;
Case Types T and X only
Time from STRBD HIGH to SCR Enable;
Case Types T and X only
10
28
30
30
Min
Max
16
28
29
31
24
24
26
26
22
30
26
30
30
25
10
24
24
24
30MHz
Min
Max
14
22
21
22
18
18
20
20
17
25
20
25
25
20
10
21
24
24
40 MHz
Min
Max
12
16
19
20
12
12
15
15
12
20
15
25
20
18
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. 4.5V
≤
V
CC
≤
5.5V, –55°C
≤
T
C
≤
+125°C. Unless otherwise specified, testing shall be conducted at worst-case conditions.
2. All measurements of delay times on active signals are related to the 1.5V levels.
Document #
MICRO-5
REV C
Page 4 of 20
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
