P4C148/P4C149
AC CHARACTERISTICS—WRITE CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym
Parameter
t
WC
Write Cycle Time
t
CW
t
AW
t
AS
t
WP
t
AH
t
DW
t
DH
t
WZ
t
OW
Chip Enable Time to End of Write
Address Valid to End of Write
Address Set-up Time
Write Pulse Width
Address Hold Time from End of Write
Data Valid to End of Write
Data Hold Time
Write Enable to Output in High Z
Output Active from End of Write
0
-10
-12
-15
-20
-25
-35
-45
-55
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max
10
12
15
20
25
35
45
55
8
8
0
8
0
5
0
5
0
10
10
0
10
0
6
0
6
0
12
12
0
12
0
7
0
7
0
16
16
0
16
0
9
0
7
0
20
20
0
20
0
12
0
8
0
25
25
0
25
0
16
0
12
0
30
30
0
30
0
20
0
15
0
35
35
0
35
0
25
0
20
WE
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED)
(9)
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE
CS
CONTROLLED)
(9)
CE/CS
CE
Notes:
9.
CE
and
WE
must be LOW for WRITE cycle.
10. If
CE
goes HIGH simultaneously with
WE
high, the output remains in a high impedance state.
11. Write Cycle Time is measured from the last valid address to the first transition address.
Document #
SRAM104
REV B
Page 4 of 10