Internet Data Sheet
HYB18TC256[80/16]0BF
256-Mbit Double-Data-Rate-Two SDRAM
Ball#
Name
Ball
Type
Buffer
Type
Function
L8
A13
NC
I
SSTL
–
Address Signal 13
–
Note: 256 Mbit components and
Data Signals ×8 organization
C8
C2
D7
D3
D1
D9
B1
B9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
Data Signal 3:0
Note: Bi-directional data bus
Data Signal 7:4
Note: Bi-directional data bus
Data Strobe×8 organizations
B7
A8
DQS
DQS
I/O
I/O
SSTL
SSTL
Data Strobe
Data Strobe ×8 organisation
B3
A2
RDQS
RDQS
O
O
SSTL
SSTL
Read Data Strobe
Data Mask ×8 organizations
B3 DM
Power Supplies ×8 organization
I
SSTL
–
Data Mask
A9,C1,C3,C7,C VDDQ
PWR
I/O Driver Power Supply
9
A1
VDD
PWR
PWR
–
–
Power Supply
A7,B2,B8,D2,D VSSQ
I/O Driver Power Supply
8
A3,E3
VSS
PWR
–
Power Supply
Power Supplies ×8 organizations
E2
VREF
VDDL
VDD
AI
–
–
–
–
–
I/O Reference Voltage
Power Supply
E1
PWR
PWR
PWR
PWR
E9,H9,L1
E7
Power Supply
VSSDL
VSS
Power Supply
J1,K9
Power Supply
Not Connected ×8 organization
G1, L3,L7, L8 NC NC
–
Not Connected
Note: No internal electrical connection is present
Other Balls ×8 organizations
F9 ODT
I
SSTL
On-Die Termination Control
Rev. 1.3, 2007-05
7
07182006-DD60-22E6
QIMONDA [ QIMONDA AG ]
